B81C1/00357

Component having a substrate with cavities with micromechanical structures located therein

A micromechanical component formed from, a substrate (100) having a first cavity (112) and a second cavity (113), a first micromechanical structure (117) arranged in the first cavity (112), and a second micromechanical structure (118) arranged in the second cavity (113). The first cavity (112) and the second cavities having respective first and second gas pressures having different values. The first gas pressure is provided by a closed configuration of the first cavity (112) and a first channel (115) opens into the second cavity (113), and the second gas pressure is adjustable via the first channel (115).

STRUCTURE TO REDUCE BACKSIDE SILICON DAMAGE

An integrated circuit (IC) device is provided. The IC device includes a first die including a first substrate and a second die including a second substrate. A plasma-reflecting layer is included on an upper surface of the first die. The plasma-reflecting layer is configured to reflect a plasma therefrom. The second substrate is bonded to the first die so as to form a cavity, wherein a lower surface of the cavity is lined by the plasma-reflecting layer. A dielectric protection layer is present on a lower surface of the second die and lines the upper surface of the cavity. A material of the second substrate has a first etch rate for the plasma and a material of the dielectric protection layer has a second etch rate for the plasma. The second etch rate is less than the first etch rate.

FABRICATION PROCESS FOR A SYMMETRICAL MEMS ACCELEROMETER
20170336437 · 2017-11-23 ·

A process for fabricating a symmetrical MEMS accelerometer. A pair of half parts is fabricated by, for each half part: (i) forming a plurality of resilient beams, first connecting parts, second connecting parts, and a plurality of comb structures, by etching a plurality of holes on a bottom surface of a first silicon wafer; (ii) etching a plurality of hollowed parts on a top surface of a second silicon wafer; (iii) forming a silicon dioxide layer on the top and bottom surface of the second silicon wafer; (iv) bonding the bottom surface of the first silicon wafer with the top surface of the second silicon wafer; (v) depositing a layer of silicon nitride on the bottom surface of the second silicon wafer, and removing parts of the silicon nitride layer and silicon dioxide layer on the bottom surface of the second silicon wafer; (vii) deep etching the exposed parts of the bottom surface of the second silicon wafer to the silicon dioxide layer located on the top surface of the second silicon wafer, and reducing the thickness of the first silicon wafer; and (viii) removing the silicon nitride layer, and etching the silicon dioxide to form the mass. The two half parts are then bonded along their bottom surface. The device is deep etched to form a movable accelerometer. A bottom cap is fabricated by hollowing out the corresponding area, and depositing metal as electrodes. The accelerometer is bonded with the bottom cap. Metal is deposited on the first silicon wafer to form electrodes.

PRECONDITIONING TO ENHANCE HYDROPHILIC FUSION BONDING
20170225948 · 2017-08-10 ·

A method for fusion bonding a pair of substrates together with silane preconditioning is provided. A surface of a first oxide layer or a surface of a second oxide layer is preconditioned with silane. The first and second oxide layers are respectively arranged on first and second semiconductor substrates. Water is applied to the surface of the first or second oxide layer. The surfaces of the first and second oxide layers are brought in direct contact. The first and second oxide layers are annealed. A method for manufacturing a microelectromechanical systems (MEMS) package using the fusion bonding is also provided.

Two-dimensional optical deflector including two SOI structures and its manufacturing method
09696541 · 2017-07-04 · ·

A two-dimensional optical deflector includes a first SOI structure and a second SOI structure. A height of a monocrystalline silicon support layer of the first SOI structure is smaller than a height of a monocrystalline silicon support layer of the second SOI structure. A mirror includes a monocrystalline silicon active layer of the first SOI structure. An inner frame, an inner piezoelectric actuator and an outer frame include a monocrystalline silicon active layer of the first SOI structure and the monocrystalline silicon active layer of the second SOI structure. An outer piezoelectric actuator includes the monocrystalline silicon active layer of the first SOI structure.

Micro-electro-mechanical transducer having an optimized non-flat surface
09676617 · 2017-06-13 · ·

A method for a capacitive micromachined ultrasound transducer (cMUT) is provided. The method grows and patterns a diffusion barrier layer over a surface of a base layer. The diffusion barrier layer have different areas that allow different levels of diffusion penetration. A diffusion process is performed over the diffusion barrier layer such that a diffusion reactivated material reaches different depths into the base layer below the different areas. A anchor is formed using the diffusion reactivated material. The anchor has a lower portion below a major surface of the base layer and an upper portion above the major surface of the base layer. A cover layer is placed over the anchor and the base layer. At least one of the cover layer and the base layer includes a flexible layer, such that the cMUT electrodes are movable relative to each other to cause a change of the gap width.

METHOD OF FABRICATING A NANOSTRUCTURE LAYER STACK

A method for producing a nanostructure layer stack having a plurality of N nanostructure layers adhered together, the method comprising: fabricating at least one nanostructure layer of N nanostructure layers comprised in a nanostructure stack on a substrate that is not another of the N nanostructure layers: vetting the at least one nanostructure layer to determine if the at least one nanostructure layer satisfies a quality constraint; and if the at least one nanostructure layer satisfies the quality constraint, adhered each of the at least one nanostructure layer to another nanostructure layer of the N nanostructure layers to form the nanostructure stack.

Crystalline magnetic layer to amorphous substrate bonding

Various methods for attaching a crystalline write pole onto an amorphous substrate and the resulting structures are described in detail herein. Further, the resulting structure may have a magnetic moment exceeding 2.4 Tesla. Still further, methods for depositing an epitaxial crystalline write pole on a crystalline seed or template material to ensure that the phase of the write pole is consistent with the high moment phase of the template material are also described in detail herein.

Devices and Methods for Solder Flow Control in Three-Dimensional Microstructures
20170055348 · 2017-02-23 ·

Structures, materials, and methods to control the spread of a solder material or other flowable conductive material in electronic and/or electromagnetic devices are provided.

Method for manufacturing an inkjet print head

Provided are a manufacturing method of an inkjet print head, the inkjet print head and a drawing apparatus equipped with the inkjet print head. The manufacturing method includes: forming a separation assisting layer on a substrate; forming heating resistors, thin-film transistors and nozzles for ejecting liquid, on the separation assisting layer; separating the separation assisting layer from the substrate; forming a first heat-conductive layer on the opposite surface of the separation assisting layer from the nozzles; and forming an ink supply port for supplying ink to the nozzles from a first heat-conductive layer side of the inkjet print head.