A shadow mask having two or more levels of openings enables selective step coverage of micro-fabricated structures within a micro-optical bench device. The shadow mask includes a first opening within a top surface of the shadow mask and a second opening within the bottom surface of the shadow mask. The second opening is aligned with the first opening and has a second width less than a first width of the first opening. An overlap between the first opening and the second opening forms a hole within the shadow mask through which selective coating of micro-fabricated structures within the micro-optical bench device may occur.

A robust and general fabrication/manufacturing method is described herein for the fabrication of periodic three-dimensional (3D) hierarchical nanostructures in a highly scalable and tunable manner. This nanofabrication technique exploits the selected and repeated etching of spherical particles that serve as resist material and that can be shaped in parallel for each processing step. The method enables the fabrication of periodic, vertically aligned nanotubes at the wafer scale with nanometer-scale control in three dimensions including outer/inner diameters, heights/hole-depths, and pitches. The method was utilized to construct 3D periodic hierarchical hybrid silicon and hybrid nanostructures such as multi-level solid/hollow nanotowers where the height and diameter of each level of each structure can be configured precisely as well as 3D concentric plasmonic supported metal nanodisk/nanorings with tunable optical properties on a variety of substrates.

Devices, systems and techniques are described for producing and implementing articles and materials having nanoscale and microscale structures that exhibit superhydrophobic, superoleophobic or omniphobic surface properties and other enhanced properties. In one aspect, a surface nanostructure can be formed by adding a silicon-containing buffer layer such as silicon, silicon oxide or silicon nitride layer, followed by metal film deposition and heating to convert the metal film into balled-up, discrete islands to form an etch mask. The buffer layer can be etched using the etch mask to create an array of pillar structures underneath the etch mask, in which the pillar structures have a shape that includes cylinders, negatively tapered rods, or cones and are vertically aligned. In another aspect, a method of fabricating microscale or nanoscale polymer or metal structures on a substrate is made by photolithography and/or nano imprinting lithography.

A shadow mask having two or more levels of openings enables selective step coverage of micro-fabricated structures within a micro-optical bench device. The shadow mask includes a first opening within a top surface of the shadow mask and a second opening within the bottom surface of the shadow mask. The second opening is aligned with the first opening and has a second width less than a first width of the first opening. An overlap between the first opening and the second opening forms a hole within the shadow mask through which selective coating of micro-fabricated structures within the micro-optical bench device may occur.

The present disclosure relates to a microelectromechanical systems (MEMS) package featuring a flat plate having a raised edge around its perimeter serving as an anti-stiction device, and an associated method of formation. A CMOS IC is provided having a dielectric structure surrounding a plurality of conductive interconnect layers disposed over a CMOS substrate. A MEMS IC is bonded to the dielectric structure such that it forms a cavity with a lowered central portion the dielectric structure, and the MEMS IC includes a movable mass that is arranged within the cavity. The CMOS IC includes an anti-stiction plate disposed under the movable mass. The anti-stiction plate is made of a conductive material and has a raised edge surrounding at least a part of a perimeter of a substantially planar upper surface.

A mirror device includes a frame body, a mirror configured to tilt about a Y-axis with respect to the frame body, a fixed inner comb electrode including a plurality of electrode fingers arranged in the arrangement direction along the Y-axis and provided at the frame body, and a movable inner comb electrode including a plurality of electrode fingers arranged in the arrangement direction and provided at the mirror, the electrodes fingers of the fixed inner comb electrode and the movable inner comb electrode being alternately arranged. The mirror includes a mirror body and an extension extending from the mirror body. Some of the electrode fingers of the movable inner comb electrode are provided at the mirror body, and another electrode fingers of the movable inner comb electrode are provided at the extension.

In one embodiment of the present invention, an electronic device includes a first emitter/collector region and a second emitter/collector region disposed in a substrate. The first emitter/collector region has a first edge/tip, and the second emitter/collector region has a second edge/tip. A gap separates the first edge/tip from the second edge/tip. The first emitter/collector region, the second emitter/collector region, and the gap form a field emission device.

Long term optical memory includes a storage medium composed from an array of silicon nanoridges positioned onto the fused silica glass. The array has first and second polarization contrast corresponding to different phase of silicon. The first polarization contrast results from amorphous phase of silicon and the second polarization contrast results from crystalline phase of silicon. The first and second polarization states are spatially distributed over plurality of localized data areas of the storage medium.

The present disclosure relates to a microelectromechanical systems (MEMS) package featuring a flat plate having a raised edge around its perimeter serving as an anti-stiction device, and an associated method of formation. A CMOS IC is provided having a dielectric structure surrounding a plurality of conductive interconnect layers disposed over a CMOS substrate. A MEMS IC is bonded to the dielectric structure such that it forms a cavity with a lowered central portion the dielectric structure, and the MEMS IC includes a movable mass that is arranged within the cavity. The CMOS IC includes an anti-stiction plate disposed under the movable mass. The anti-stiction plate is made of a conductive material and has a raised edge surrounding at least a part of a perimeter of a substantially planar upper surface.

A MEMS device includes a first structure including at least one first bump over a surface of the first structure, a second structure including a first side facing the surface of the first bump and a second side opposite to the first side, and a gap between the first structure and the second structure. The first structure and the second structure are configured to move in relation to each other. The first bump includes a plurality of first teeth over a stop surface of the first bump.