A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

Methods of manufacturing a pressure sensor are provided. In preferred embodiments, the method comprises: forming a cavity in a first side of a silicon starting material; depositing a layer of a second material over the cavity; removing a first portion of material above the cavity from a second side of the silicon starting material to expose the second material to the second side to form a diaphragm from the second material and wherein, a second portion of material above the cavity that was not removed from the silicon starting material, forms at least one support structure that spans the diaphragm, wherein the second side is opposite to the first side; and forming at least one piezoresistor in the silicon starting material over an intersection of the support structure and the silicon starting material at an outside edge of the diaphragm on the second side.

A method for producing a thin-film layer includes providing a layer stack on a carrier substrate, wherein the layer stack includes a carrier layer and a sacrificial layer, and wherein the sacrificial layer includes areas in which the carrier layer is exposed. The method includes providing the thin-film layer on the layer stack, such that the thin-film layer bears on the sacrificial layer and, in the areas of the sacrificial layer in which the carrier layer is exposed, against the carrier layer. The method includes at least partly removing the sacrificial layer from the thin-film layer in order to eliminate a contact between the thin-film layer and the sacrificial layer in some areas. The method also includes detaching the thin-film layer from the carrier layer.

A device comprising a micro-electro-mechanical system (MEMS) substrate with protrusions of different heights that has been integrated with a complementary metal-oxide-semiconductor (CMOS) substrate is presented herein. The MEMS substrate comprises defined protrusions of respective distinct heights from a surface of the MEMS substrate, and the MEMS substrate is bonded to the CMOS substrate. In an aspect, the defined protrusions can be formed from the MEMS substrate. In another aspect, the defined protrusions can be deposited on, or attached to, the MEMS substrate. In yet another aspect, the MEMS substrate comprises monocrystalline silicon and/or polysilicon. In yet even another aspect, the defined protrusions comprise respective electrodes of sensors of the device.

A micro-device structure comprises a source substrate having a sacrificial layer comprising a sacrificial portion adjacent to an anchor portion, a micro-device disposed completely over the sacrificial portion, the micro-device having a top side opposite the sacrificial portion and a bottom side adjacent to the sacrificial portion and comprising an etch hole that extends through the micro-device from the top side to the bottom side, and a tether that physically connects the micro-device to the anchor portion. A micro-device structure comprises a micro-device disposed on a target substrate. Micro-devices can be 10 any one or more of an antenna, a micro-heater, a power device, a MEMs device, and a micro-fluidic reservoir.

A semiconductor oxide plate is formed on a recessed surface in a semiconductor matrix material layer. Comb structures are formed in the semiconductor matrix material layer. The comb structures include a pair of inner comb structures spaced apart by a first semiconductor portion. A second semiconductor portion that laterally surrounds the first semiconductor portion is removed selective to the comb structures using an isotropic etch process. The first semiconductor portion is protected from an etchant of the isotropic etch process by the semiconductor oxide plate, the pair of inner comb structures, and a patterned etch mask layer that covers the comb structures. A movable structure for a MEMS device is formed, which includes a combination of the first portion of the semiconductor matrix material layer and the pair of inner comb structures.

In accordance with an embodiment, a MEMS structure is produced on a front side of a substrate. A decoupling structure which has recesses is produced in the substrate, which decoupling structure decouples a first region from a second region of the substrate in terms of stresses. In a rear side, situated opposite the front side, of the substrate, a first cavity is produced by means of a first etching process and a second cavity is produced by means of a second etching process. The first cavity and the second cavity are produced such that the second cavity encompasses the first cavity and such that the second cavity adjoins a base region of the MEMS structure and a base region of the decoupling structure.

A method for forming a micro-electro-mechanical system (MEMS) device structure is provided. The method includes forming a second substrate over a first substrate, and a cavity is formed between the first substrate and the second substrate. The method includes forming a hole through the second substrate using an etching process, and the hole is connected to the cavity. The etching process includes a plurality of etching cycles, and each of the etching cycles includes an etching step, and the etching step has a first stage and a second stage. The etching time of each of the etching steps during the second stage is gradually increased as the number of etching cycles is increased.

A process flow for forming magnetic tunnel junction (MTJ) nanopillars with minimal sidewall residue and minimal sidewall damage is disclosed wherein a pattern is first formed in a hard mask that is an uppermost MTJ layer. Thereafter, the hard mask sidewall is etch transferred through the remaining MTJ layers including a reference layer, free layer, and tunnel barrier between the free layer and reference layer. The etch transfer may be completed in a single RIE step that features a physical component involving inert gas ions or plasma, and a chemical component comprised of ions or plasma generated from one or more of methanol, ethanol, ammonia, and CO. In other embodiments, a chemical treatment with one of the aforementioned chemicals, and a volatilization at 50 C. to 450 C. may follow an etch transfer through the MTJ stack with an ion beam etch or plasma etch involving inert gas ions.

A method of manufacturing a MEMS device, wherein the MEMS device has a cavity in which a beam will move to change the capacitance of the device. After most of the device build-up has occurred, sacrificial material is removed to free the beam within the MEMS device cavity. Thereafter, exposed ruthenium contacts are etched back with an etchant comprising chlorine to remove the top surface of both the top and bottom contacts. Due to this etch back process, low contact resistance can be achieved with less susceptibility to stiction events. Stiction performance can be further improved by conditioning the ruthenium contacts in a fluorine based plasma. The fluorine based plasma process, or fluorine treatment, can be performed prior to or after etch-back process of the ruthenium contacts.