A method comprises forming an etch stop layer, a first titanium layer, a magnetic core, a second titanium layer, and patterning the first and second titanium layers. The etch stop layer is formed above a substrate. The first titanium layer is formed on the etch stop layer. The magnetic core is formed on the first titanium layer. The second titanium layer has a first portion encapsulating the magnetic core with the first titanium layer, and a second portion interfacing with the first titanium layer beyond the magnetic core. The patterning of the first and second titanium layers includes forming a mask over a magnetic core region and etching the first and second titanium layers exposed by the mask using a titanium etchant and a titanium oxide etchant.

A method comprises forming an etch stop layer, a first titanium layer, a magnetic core, a second titanium layer, and patterning the first and second titanium layers. The etch stop layer is formed above a substrate. The first titanium layer is formed on the etch stop layer. The magnetic core is formed on the first titanium layer. The second titanium layer has a first portion encapsulating the magnetic core with the first titanium layer, and a second portion interfacing with the first titanium layer beyond the magnetic core. The patterning of the first and second titanium layers includes forming a mask over a magnetic core region and etching the first and second titanium layers exposed by the mask using a titanium etchant and a titanium oxide etchant.

An anodic oxide film structure cutting method is provided. The method includes: an etching step of forming an etched groove by etching one surface of an anodic oxide film having a plurality of anodizing pores along a predetermined cutting line and forming increased-diameter pores by enlarging entrances of the anodizing pores positioned on an inner bottom surface of the etched groove; and a cutting step of cutting the anodic oxide film along the etched groove. Also provided is a unit anodic oxide film structure produced by the cutting method.

In some embodiments, a microelectromechanical system may include a semiconductor substrate, a plurality of wiring layers, and a stop. The plurality of wiring layers may be coupled to a first surface of the semiconductor substrate. The stop may be coupled to the plurality of wiring layers. In some embodiments, at least a portion of the plurality of wiring layers between the stop and the first surface of the substrate comprises an insulating material. In some embodiments, at least the portion excludes wiring within. In some embodiments, a volume of the portion may be determined by a use of the microelectromechanical system. In some embodiments, the portion may inhibit, during use, electrical failures adjacent to the stop.

A thermal airflow sensor includes a semiconductor device, a protective film a bonding wire, and a resin. The resin covers over a part of the semiconductor device so that the bonding wire is covered with the resin and the region including a thin-wall portion is exposed. The protective film is not covered with the resin and has an outer peripheral edge located outside the thin-wall portion.

A device includes a substrate, a first structure, a second structure, a third structure and a bumper. The first structure is over the substrate. The second structure is over the substrate, wherein the second structure has a first end coupled to the first structure. The third structure is over the substrate, wherein the third structure is coupled to a second end of the second structure. The bumper is between the substrate and the third structure, wherein the bumper is a multi-layered bumper including a first conductive feature, a dielectric feature and a second conductive feature. The dielectric feature is over the first conductive feature. The second conductive feature is over the dielectric feature and electrically connected to the first conductive feature.

A method of manufacturing a semiconductor device package includes disposing at least one die over a substrate, dispensing a liquid material on the die, and curing the liquid material so that the liquid material forms a protective layer attached to a portion of the die. The method further includes forming an encapsulant covering at least a portion of the substrate and a portion of the die, where the protective layer is exposed from the encapsulant in a cavity defined by the encapsulant. The method further includes removing the protective layer from the die, and disposing a cap over the cavity.

A device includes a substrate, a first structure, a second structure, a third structure and a bumper. The first structure is over the substrate. The second structure is over the substrate, wherein the second structure has a first end coupled to the first structure. The third structure is over the substrate, wherein the third structure is coupled to a second end of the second structure. The bumper is between the substrate and the third structure, wherein the bumper is a multi-layered bumper including a first conductive feature, a dielectric feature and a second conductive feature. The dielectric feature is over the first conductive feature. The second conductive feature is over the dielectric feature and electrically connected to the first conductive feature.

A sealed package having a device disposed on a wafer structure and a lid structure boned to the device wafer. The device wafer includes: a substrate; a metal ring disposed on a surface portion of substrate around the device and a bonding material disposed on the metal ring. The metal ring extends laterally beyond at least one of an inner and outer edge of the bonding material. A first layer of the metal ring includes a stress relief buffer layer having a higher ductility than that of the surface portion of the substrate and a width greater than the width of the bonding material. The metal ring extends laterally beyond at least one of the inner and outer edges of the bonding material. The stress relief buffer layer has a coefficient of thermal expansion greater than the coefficient of expansion of the surface portion of the substrate and less than the coefficient of expansion of the bonding material.

An integrated MEMS device is provided. The integrated MEMS device comprises a circuit chip and a device chip. The circuit chip has a patterned first bonding layer disposed thereon, the bonding layer being composed of a conductive material/materials. The device chip has a first structural layer and a second structural layer, the first structural layer being connected to the second structural layer and the first bonding layer of the circuit chip, and being sandwiched between the second structural layer and the circuit chip. A plurality of hermetic spaces are enclosed by the first structural layer, the second structural layer, the first bonding layer and the circuit chip.