The present disclosure relates to a method for fabricating a micro-electromechanical system (MEMS) device. In the method, a carrier wafer is received. A MEMS wafer, which includes a plurality of die, is bonded to the carrier wafer. A cavity is formed to separate an upper surface of the carrier wafer from a lower surface of a die of the MEMS wafer. A separation trench is formed to laterally surround the die, wherein formation of the cavity and the separation trench leaves a tethering structure suspending the die over the upper surface of the carrier wafer. The die and carrier wafer are translated with respect to one another to break the tethering structure and separate the die from the carrier wafer.

A method for producing a plurality of sensor devices. The method includes: furnishing a substrate having contact points in a plurality of predetermined regions for sensor chips; disposing the sensor chips in the predetermined regions on the substrate, and electrically contacting the sensor chips to the contact points; attaching a frame structure with an adhesive material on the substrate and between the sensor chips, the frame structure proceeding laterally around the sensor chips, the frame structure extending, after attachment, vertically beyond the sensor chips and forming a respective cavity for at least one of the sensor chips, and a membrane spanning at least one of the cavities for the sensor chips so as to cover it; and singulating the substrate, or the frame structure and the substrate, around the respective cavities into several sensor devices.

A physical quantity sensor includes a supporting substrate, an acceleration detecting element that is mounted on the supporting substrate, and a sealing substrate that is bonded to the supporting substrate, and seals the acceleration detecting element, in which a notch portion is formed in a portion of a bonded face to the supporting substrate, in the sealing substrate, and a filling material that is configured by a material which is different from a material configuring the sealing substrate, is arranged in the notch portion.

A method for fabricating packaged semiconductor devices (100) with an open cavity (110a) in panel format; placing (process 201) on an adhesive carrier tape a panel-sized grid of metallic pieces having a flat pad (230) and symmetrically placed vertical pillars (231); attaching (process 202) semiconductor chips (101) with sensor systems face-down onto the tape; laminating (process 203) and thinning (process 204) low CTE insulating material (234) to fill gaps between chips and grid; turning over (process 205) assembly to remove tape; plasma-cleaning assembly front side, sputtering and patterning (process 206) uniform metal layer across assembly and optionally plating (process 209) metal layer to form rerouting traces and extended contact pads for assembly; laminating (process 212) insulating stiffener across panel; opening (process 213) cavities in stiffener to access the sensor system; and singulating (process 214) packaged devices by cutting metallic pieces.

A structure and a fabrication method thereof are provided. The method includes the following operations. A device substrate having a first surface and a second surface opposite to each other is received. A carrier substrate having a third surface and a fourth surface opposite to each other is received. An intermediate layer is formed between the third surface of the carrier substrate and the second surface of the device substrate. The second surface of the device substrate is attached to the third surface of the carrier substrate. The device substrate is thinned from the first surface. A device is formed over the first surface of the device substrate. The carrier substrate and the device substrate are patterned from the fourth surface to form a cavity in the carrier substrate, the intermediate layer and the device substrate.

Diaphragm 33 is provided on a top surface of silicon substrate 32, and plate unit 39 is fixed to the top surface of silicon substrate 32 so as to cover the movable electrode film with a gap. Plate unit 39 is made of an insulating material. Fixed electrode film 40 is formed on a bottom surface of plate unit 39, and diaphragm 33 and fixed electrode film 40 constitute a capacitor. In an area around plate unit 39, a whole outer peripheral edge of the top surface of silicon substrate 32 is exposed from plate unit 39. On the top surface of the substrate 32, insulating sheet 47 made of the insulating material is formed in a part of an area exposed from plate unit 39, and electrode pad 48 electrically connected to diaphragm 33 and electrode pad 49 electrically connected to fixed electrode film 40 are provided on a top surface of insulating sheet 47.

A MEMS micro-mirror assembly (250, 300, 270, 400) comprising, a MEMS device (240) which comprises a MEMS die (241) and a magnet (231); a flexible PCB board (205) to which the MEMS device (240) is mechanically, and electrically, connected; wherein the flexible PCB board (205) further comprises a first extension portion (205b) which comprises a least one electrical contact (259a,b) which is useable to electrically connect the MEMS micro-mirror assembly (250, 300, 270, 400) to another electrical component). There is further provided a projection system comprising such a MEMS micro-mirror assembly (250, 300, 270, 400).

A method for fabricating packaged semiconductor devices (100) with an open cavity (110a) in panel format; placing (process 201) on an adhesive carrier tape a panel-sized grid of metallic pieces having a flat pad (230) and symmetrically placed vertical pillars (231); attaching (process 202) semiconductor chips (101) with sensor systems face-down onto the tape; laminating (process 203) and thinning (process 204) low CTE insulating material (234) to fill gaps between chips and grid; turning over (process 205) assembly to remove tape; plasma-cleaning assembly front side, sputtering and patterning (process 206) uniform metal layer across assembly and optionally plating (process 209) metal layer to form rerouting traces and extended contact pads for assembly; laminating (process 212) insulating stiffener across panel; opening (process 213) cavities in stiffener to access the sensor system; and singulating (process 214) packaged devices by cutting metallic pieces.

A die includes a substrate; an insulation layer arranged on the substrate; a device layer arranged on the insulation layer, with a microelectromechanical systems (MEMS) device, having openings into one or more inner cavities, being defined within the device layer; a shelf, around an outside of the die, that delineates a change in a cross-sectional width of the die; and weakened structural regions arranged below the shelf and proximate to the outside of the die. The shelf is arranged at a predefined depth of the die such that the shelf is arranged at the device layer, at the insulation layer, or at the substrate.