B81C1/00888

BIOSENSOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
20180354781 · 2018-12-13 ·

A biosensor package structure is provided. The biosensor package structure includes a protection layer and a redistribution layer disposed over the protection layer. The protection layer has a plurality of openings exposing the redistribution layer. The biosensor package structure includes at least one die disposed over the protection layer and the redistribution layer, a plurality of pads disposed on a lower surface of the die, and a plurality of vias disposed between the pads and the redistribution layer. The biosensor package structure includes a dielectric material disposed over the protection layer and the redistribution layer and adjacent to the die, pads and vias. The biosensor package structure further includes at least one biosensing region at the top portion of the die. The top surfaces of the pads are disposed at a level that is lower than the top surface of the biosensing region and higher than the bottom surface of the die.

Integrated circuit package and method of forming same

Integrated circuit packages and methods of forming same are provided. A method includes attaching a first die and a second die to a carrier, the first die having a first contact pad, the second die having a second contact pad, the first contact pad and the second contact pad having different structures. A release layer is formed over the first die and the second die. An encapsulant is injected between the carrier and the release layer. One or more redistribution layers (RDLs) are formed over the first die, the second die and the encapsulant, the first contact pad and the second contact pad being in electrical contact with the one or more RDLs.

Fabrication of a microfluidic chip package or assembly with separable chips

The present invention is notably directed to methods of fabrication of a microfluidic chip package or assembly (1), comprising: providing (S1) a substrate (10, 30) having at least one block (14, 14a) comprising one or more microfluidic structures on a face (F) of the substrate; partially cutting (S2) into the substrate to obtain partial cuts (10c), such that a residual thickness of the substrate at the level of the partial cuts (10c) enables singulation of said at least one block (14, 14a); cleaning (S4) said at least one block; and applying (S5-S7) a cover-film (62) to cover said at least one block (14, 14a), whereby at least one covered block is obtained, the applied cover film still enabling singulation of each covered block, wherein each covered block corresponds to a microfluidic chip after singulation. The present invention is further directed to microfluidic chips, packing or assembly, obtainable with such methods.

MEMS device

The present disclosure provides a method for forming micro-electro-mechanical-system (MEMS) devices. The method includes providing a plurality of wafers; bonding a front surface of at least a first wafer onto a front surface of a second wafer; trimming an edge of and thinning the at least first wafer after the at least first wafer is bonded onto the second wafer; and bonding a first supporting plate onto a front surface of a third wafer. The method further includes thinning a back surface of the third wafer and forming alignment marks on a thinned back surface of the third wafer; bonding a second supporting plate onto the thinned back surface of the third wafer according to the alignment marks; and removing the first supporting plate and bonding the at least first wafer onto the third wafer according to the alignment marks to form a stack structure.

Integrated Circuit Package and Method of Forming Same

Integrated circuit packages and methods of forming same are provided. A method includes attaching a first die and a second die to a carrier, the first die having a first contact pad, the second die having a second contact pad, the first contact pad and the second contact pad having different structures. A release layer is formed over the first die and the second die. An encapsulant is injected between the carrier and the release layer. One or more redistribution layers (RDLs) are formed over the first die, the second die and the encapsulant, the first contact pad and the second contact pad being in electrical contact with the one or more RDLs.

METHOD AND SYSTEM OF STRAIN GAUGE FABRICATION
20180072569 · 2018-03-15 ·

A method of strain gauge fabrication is presented herein. The method includes: providing a first substrate having a cavity side; providing a second substrate having a semiconductor side; positioning the second substrate in relation to the first substrate such that the semiconductor side and the cavity side are contactable; processing the second substrate such that the first and second substrates are substantially joined via the semiconductor side and the cavity side; and etching the second substrate to define a strain gauge cantilevered over the cavity side of the first substrate.

METHOD FOR PRODUCING A SEMICONDUCTOR MODULE

The method comprises fabricating a semiconductor panel comprising a plurality of semiconductor devices, fabricating a cap panel comprising a plurality of caps, bonding the cap panel onto the semiconductor panel so that each one of the caps covers one or more of the semiconductor devices, and singulating the bonded panels into a plurality of semiconductor modules.

Integrated circuit package and method of forming same

Integrated circuit packages and methods of forming same are provided. A method includes attaching a first die and a second die to a carrier, the first die having a first contact pad, the second die having a second contact pad, the first contact pad and the second contact pad having different structures. A release layer is formed over the first die and the second die. An encapsulant is injected between the carrier and the release layer. One or more redistribution layers (RDLs) are formed over the first die, the second die and the encapsulant, the first contact pad and the second contact pad being in electrical contact with the one or more RDLs.

DRY SCRIBING METHODS, DEVICES AND SYSTEMS

A transducer includes a first substrate and an integrated circuit coupled to the first substrate. A sensor is electrically coupled to the integrated circuit and includes a second substrate having a first surface and a second surface opposite the first surface. The second substrate has scribe boundaries defining an outer edge of the second substrate and a chamber extending from the first surface towards but not reaching the second surface. A chamber extends from the second surface to meet the chamber from first surface. Scribe trenches in the second surface at the scribe boundaries have a width from the scribe boundary towards the chamber extending from the second surface. A membrane extends over the first surface and over the chamber extending from first surface. A plate extends from the first surface of the second substrate over the membrane.

Anodic oxide film structure cutting method and unit anodic oxide film structure

An anodic oxide film structure cutting method is provided. The method includes: an etching step of forming an etched groove by etching one surface of an anodic oxide film having a plurality of anodizing pores along a predetermined cutting line and forming increased-diameter pores by enlarging entrances of the anodizing pores positioned on an inner bottom surface of the etched groove; and a cutting step of cutting the anodic oxide film along the etched groove. Also provided is a unit anodic oxide film structure produced by the cutting method.