B81C99/004

Singulation of wafer level packaging

A method includes, before attaching a window assembly to a semiconductor wafer, the semiconductor wafer including a plurality of integrated circuits and each integrated circuit including an electrical connection pad, adhering the window assembly to a carrier fixture. The method further includes, before attaching the window assembly to the semiconductor wafer, removing portions of the window assembly to create removal areas. The method then includes attaching the window assembly to the semiconductor wafer such that the electrical connection pad of each of the plurality of integrated circuits is within a removal area and removing the carrier fixture leaving the window assembly adhered to the semiconductor wafer with the electrical connection pad exposed of each of the plurality of integrated circuits.

REDUNDANT SENSOR SYSTEM WITH SELF-TEST OF ELECTROMECHANICAL STRUCTURES

A sensor system includes first and second MEMS structures and a processing circuit. The first and second MEMS structures are configured to produce first and second output signals, respectively, in response to a physical stimulus. A method performed by the processing circuit entails receiving the first and second output signals and detecting a defective one of the first and second MEMS structures from the first and second output signals by determining that the first and second output signals are uncorrelated to one another. The method further entails utilizing only the first or the second output signal from a non-defective one of the MEMS structures to produce a processed output signal when one of the MEMS structures is determined to be defective and utilizing the first and second output signals from both of the MEMS structures to produce the processed output signal when neither of the MEMS structures is defective.

STRUCTURE AND METHODOLOGY FOR DETECTING DEFECTS DURING MEMS DEVICE PRODUCTION
20210155474 · 2021-05-27 ·

A wafer includes a process control monitor (PCM) structure formed on a substrate. The PCM structure includes detection and reference structures. The detection structure includes a first electrically conductive line arrangement formed in a first structural layer on the substrate and a first protection layer surrounding the first electrically conductive line arrangement. The reference structure includes a second electrically conductive line arrangement formed in the first structural layer on the substrate, a second protection layer surrounding the second electrically conductive line arrangement, an insulator material formed overlying the second electrically conductive line arrangement and the second protection layer, and a second structural layer overlying the insulator material. The insulator material does not overlie the detection structure. Methodology entails measuring a capacitance between the detection structure and the substrate, measuring another capacitance between the reference structure and substrate, and comparing the two capacitances to determine whether defects exist.

Apparatus and method for packaging, handling or testing of sensors

A method of testing sensors includes providing a test sheet that includes a plurality of sensor assemblies, a plurality of test pads, and traces extending from the sensor assemblies to the plurality of test pads. A sensor is positioned on each sensor assembly. Each sensor is connected to the sensor assembly with wire bonds. An enclosure is formed over the plurality of sensor assemblies. An electrical signal is detected from each of the plurality of sensor assemblies at the test pads.

Structure and methodology for detecting defects during MEMS device production
10941037 · 2021-03-09 · ·

A wafer includes a process control monitor (PCM) structure formed on a substrate. The PCM structure includes detection and reference structures. The detection structure includes a first electrically conductive line arrangement formed in a first structural layer on the substrate and a first protection layer surrounding the first electrically conductive line arrangement. The reference structure includes a second electrically conductive line arrangement formed in the first structural layer on the substrate, a second protection layer surrounding the second electrically conductive line arrangement, an insulator material formed overlying the second electrically conductive line arrangement and the second protection layer, and a second structural layer overlying the insulator material. The insulator material does not overlie the detection structure. Methodology entails measuring a capacitance between the detection structure and the substrate, measuring another capacitance between the reference structure and substrate, and comparing the two capacitances to determine whether defects exist.

METHOD FOR MANUFACTURING MIRROR DEVICE

A method for manufacturing a mirror device is a method for manufacturing a mirror device including a structural body that includes a support portion, a movable portion, and a coupling portion, and a mirror layer provided on the movable portion. The method for manufacturing a mirror device includes: a first forming step of forming a plurality of parts on a wafer, each of the plurality of parts corresponding to the structural body; a second forming step of forming the mirror layer on a part of each of the plurality of parts, the part corresponding to the movable portion; a heating step of heating the part of each of the plurality of parts, corresponding to the movable portion, after the first forming step and the second forming step; and a cutting step of cutting the wafer to separate the plurality of parts from one another, after the heating step.

Apparatus and method for packaging, handling or testing of sensors

A method of testing sensors includes providing a test sheet that includes a plurality of sensor assemblies, a plurality of test pads, and traces extending from the sensor assemblies to the plurality of test pads. A sensor is positioned on each sensor assembly. Each sensor is connected to the sensor assembly with wire bonds. An enclosure is formed over the plurality of sensor assemblies. An electrical signal is detected from each of the plurality of sensor assemblies at the test pads.

ADAPTIVE CAVITY THICKNESS CONTROL FOR MICROMACHINED ULTRASONIC TRANSDUCER DEVICES

A method of forming an ultrasonic transducer device includes forming and patterning a film stack over a substrate, the film stack comprising a metal electrode layer and a chemical mechanical polishing (CMP) stop layer formed over the metal electrode layer; forming an insulation layer over the patterned film stack; planarizing the insulation layer to the CMP stop layer; measuring a remaining thickness of the CMP stop layer; and forming a membrane support layer over the patterned film stack, wherein the membrane support layer is formed at thickness dependent upon the measured remaining thickness of the CMP stop layer, such that a combined thickness of the CMP stop layer and the membrane support layer corresponds to a desired transducer cavity depth.

Sensor characteristic evaluation method and charged particle beam device

A redeposited material is removed so as to electrically observe a microelement without causing foreign matters or metal contamination. An FIB device (charged particle beam device) includes an FIB barrel which discharges the focused ion beam (charged particle beam), a stage which holds a sample (substrate), a microcurrent measuring device (current measuring unit) which measures a leakage current from the sample, and a timer (time measuring unit) which measures a time to emit the focused ion beam and a time to measure the leakage current. Further, the FIB device includes a system control unit (control unit) which synchronizes a time to emit the focused ion beam and a time to measure the leakage current by the microcurrent measuring device.

SINGULATION OF WAFER LEVEL PACKAGING
20200231434 · 2020-07-23 ·

A method includes, before attaching a window assembly to a semiconductor wafer, the semiconductor wafer including a plurality of integrated circuits and each integrated circuit including an electrical connection pad, adhering the window assembly to a carrier fixture. The method further includes, before attaching the window assembly to the semiconductor wafer, removing portions of the window assembly to create removal areas. The method then includes attaching the window assembly to the semiconductor wafer such that the electrical connection pad of each of the plurality of integrated circuits is within a removal area and removing the carrier fixture leaving the window assembly adhered to the semiconductor wafer with the electrical connection pad exposed of each of the plurality of integrated circuits.