A deep cavity etching method is disclosed. The deep cavity includes a large cavity and a small cavity forming a step. The method includes the following steps: providing a silicon substrate containing at least an upper surface; forming an oxide layer on the upper surface of the silicon substrate; and coating the first photoresist on the side of the oxide layer away from the silicon substrate. The deep cavity of the step avoids the photoresist spraying process with higher efficiency and lower cost, reduces the process cost and improves the production capacity.

Selective deposition methods are described. An exemplary method comprises exposing the substrate comprising a first surface and a second surface to an anchor reactant and selectively depositing the anchor reactant on the first surface as a seed layer, wherein the anchor reactant comprises an ethynyl derivative with a headgroup that selectively targets the first surface.

A method for manufacturing a filtering module comprising the steps of: forming a multilayer body comprising a filter layer of semiconductor material and having a thickness of less than 10 μm, a first structural layer coupled to a first side of the filter layer, and a second structural layer coupled to a second side, opposite to the first side, of the filter layer; forming a recess in the first structural layer, which extends throughout its thickness; removing selective portions, exposed through the recess, of the filter layer to form a plurality of openings, which extend throughout the thickness of the filter layer; and completely removing the second structural layer to connect fluidically the first and second sides of the filter layer, thus forming a filtering membrane designed to inhibit passage of contaminating particles.

A process for manufacturing a MEMS device includes forming a first structural layer of a first thickness on a substrate. First trenches are formed through the first structural layer, and masking regions separated by first openings are formed on the first structural layer. A second structural layer of a second thickness is formed on the first structural layer in direct contact with the first structural layer at the first openings and forms, together with the first structural layer, thick structural regions having a third thickness equal to the sum of the first and the second thicknesses. A plurality of second trenches are formed through the second structural layer, over the masking regions, and third trenches are formed through the first and the second structural layers by removing selective portions of the thick structural regions.

A method including fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a hardmask on a second side of the device wafer, wherein the second side is planar. An etch stop layer is deposited over the hardmask and an exposed portion of the second side of the device wafer. A dielectric layer is formed over the etch stop layer. A via is formed within the dielectric layer. The via is filled with conductive material. A eutectic bond layer is formed over the conductive material. Portions of the dielectric layer uncovered by the eutectic bond layer is etched to expose the etch stop layer. The exposed portions of the etch stop layer is etched. A micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.

A method includes forming a bumpstop from a first intermetal dielectric (IMD) layer and forming a via within the first IMD, wherein the first IMD is disposed over a first polysilicon layer, and wherein the first polysilicon layer is disposed over another IMD layer that is disposed over a substrate. The method further includes depositing a second polysilicon layer over the bumpstop and further over the via to connect to the first polysilicon layer. A standoff is formed over a first portion of the second polysilicon layer, and wherein a second portion of the second polysilicon layer is exposed. The method includes depositing a bond layer over the standoff.

A device includes a substrate and an intermetal dielectric (IMD) layer disposed over the substrate. The device also includes a first plurality of polysilicon layers disposed over the IMD layer and over a bumpstop. The device also includes a second plurality of polysilicon layers disposed within the IMD layer. The device includes a patterned actuator layer with a first side and a second side, wherein the first side of the patterned actuator layer is lined with a polysilicon layer, and wherein the first side of the patterned actuator layer faces the bumpstop. The device further includes a standoff formed over the IMD layer, a via through the standoff making electrical contact with the polysilicon layer of the actuator and a portion of the second plurality of polysilicon layers and a bond material disposed on the second side of the patterned actuator layer.

Methods for fabricating sub-lithographic, nanoscale microstructures utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.

A method including fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a hardmask on a second side of the device wafer, wherein the second side is planar. An etch stop layer is deposited over the hardmask and an exposed portion of the second side of the device wafer. A dielectric layer is formed over the etch stop layer. A via is formed within the dielectric layer. The via is filled with conductive material. A eutectic bond layer is formed over the conductive material. Portions of the dielectric layer uncovered by the eutectic bond layer is etched to expose the etch stop layer. The exposed portions of the etch stop layer is etched. A micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.

A method of manufacturing a micro-fluidic probe that is relatively simple comprises providing a pyramidal pit in a substrate with a structural layer. Then metal masking layers using directionally depositing are provided. The angles of deposition are chosen such that for one deposition step the walls are covered but at least one wall is left less or not exposed, whereas for the other deposition said at least one wall is covered except for a bottom section thereof. Thus these deposited layers can be used as masks for etching the structural layer.