Provided are a method for preparing a silicon wafer with a rough surface and a silicon wafer, which solves the problem in the prior art that viscous force is likely to be generated. The method includes: depositing a first film layer having a large surface roughness on a surface of a silicon wafer that has been subjected to planar planarization, and then blanket etching the first film layer to remove the first film layer. Then, the surface of the first silicon layer facing away from the substrate is further etched to form grooves and protrusions, which provide roughness, thereby forming a silicon wafer with a rough surface. When the silicon wafer approaches to another film layer, the viscous force generated therebetween is reduced, and thus the sensitivity of the MEMS device is improved and the probability of out-of-work MEMS device is reduced.

A modification to rough polysilicon using ion implantation and silicide is provided herein. A method can comprise depositing a hard mask on a single crystal silicon, patterning the hard mask, and depositing metal on the single crystal silicon. The method also can comprise forming silicide based on causing the metal to react with exposed silicon of the single crystal silicon. Further, the method can comprise removing unreacted metal and stripping the hard mask from the single crystal silicon. Another method comprises forming a MEMS layer, wherein the forming comprises fusion bonding a handle layer with a device layer. The method also can comprise implanting rough polysilicon on the device layer. Implanting the rough polysilicon can comprise performing ion implantation of the rough polysilicon. Further, the method can comprise performing high temperature annealing. The high temperature can comprise a temperature in a range between around 700 and 1100 degrees Celsius.

A system including two components intended to be in friction contact with each other in a given direction, wherein the friction occurs in a functional area, wherein the system is at least one of the two components including, on a surface in the functional area, a texture formed of a series of troughs of rounded shape separated by peaks or a series of bumps of rounded shape separated by troughs, the troughs extending parallel in the given direction and allowing for the evacuation of debris produced by friction and serving as a reservoir for a lubricant. A method for manufacturing at least one component or a mold by the DRIE (deep reactive ion etching) process, wherein surface defects on the sidewalls machined by the DRIE process are used to form the troughs.

A method for manufacturing a semiconductor on insulator type structure by transfer of a layer from a donor substrate onto a receiver substrate, comprises: a) the supply of the donor substrate and the receiver substrate, b) the formation in the donor substrate of an embrittlement zone delimiting the layer to transfer, c) the bonding of the donor substrate on the receiver substrate, the surface of the donor substrate opposite to the embrittlement zone with respect to the layer to transfer being at the bonding interface, and d) the detachment of the donor substrate along the embrittlement zone. A step of controlled modification of the curvature of the donor substrate and/or the receiver substrate is performed before the bonding step.

A method for manufacturing a MEMS structure is provided. The method includes providing a MEMS substrate having a first surface, forming a first buffer layer on the first surface of the MEMS substrate, and forming a first roughening layer on the first buffer layer. Also, a MEMS structure is provided. The MEMS structure includes a MEMS substrate, a first buffer layer, a first roughening layer, and a CMOS substrate. The MEMS substrate has a first surface and a pillar is on the first surface. The first buffer layer is on the first surface. The first roughening layer is on the first buffer layer. The CMOS substrate has a second surface and is bonded to the MEMS substrate via the pillar. Moreover, an air gap is between the first roughening layer and the second surface of the CMOS substrate.

Processes for fabricating capacitive micromachined ultrasonic transducers (CMUTs) are described, as are CMUTs of various doping configurations. An insulating layer separating conductive layers of a CMUT may be formed by forming the layer on a lightly doped epitaxial semiconductor layer. Dopants may be diffused from a semiconductor substrate into the epitaxial semiconductor layer, without diffusing into the insulating layer. CMUTs with different configurations of N-type and P-type doping are also described.

A MEMS microphone includes a substrate defining a cavity, a diaphragm being spaced apart from the substrate, covering the cavity, and configured to generate a displacement of the diaphragm in response to an applied acoustic pressure, an anchor extending from an end portion of the diaphragm, and fixed to an upper surface of the substrate to support the diaphragm and a back plate disposed over the diaphragm, the back plate being spaced apart from the diaphragm such that an air gap is maintained between the back plate and the diaphragm, and defining a plurality of acoustic holes, wherein the anchor has a repetitive concave-convex shape in a direction toward a center of the diaphragm so that the anchor acts as a resistance to an acoustic wave.

The present disclosure relates to a microelectromechanical systems (MEMS) apparatus. The MEMS apparatus includes a base substrate and a conductive routing layer disposed over the base substrate. A bump feature is disposed directly over the conductive routing layer. Opposing outermost sidewalls of the bump feature are laterally between outermost sidewalls of the conductive routing layer. A MEMS substrate is bonded to the base substrate and includes a MEMS device directly over the bump feature. An anti-stiction layer is arranged on one or more of the bump feature and the MEMS device.

A modification to rough polysilicon using ion implantation and silicide is provided herein. A method can comprise depositing a hard mask on a single crystal silicon, patterning the hard mask, and depositing metal on the single crystal silicon. The method also can comprise forming silicide based on causing the metal to react with exposed silicon of the single crystal silicon. Further, the method can comprise removing unreacted metal and stripping the hard mask from the single crystal silicon. Another method can comprise forming a MEMS layer based on fusion bonding a handle MEMS with a device layer. The method also can comprise implanting rough polysilicon on the device layer. Implanting the rough polysilicon can comprise performing ion implantation of the rough polysilicon. Further, the method can comprise performing high temperature annealing. The high temperature can comprise a temperature in a range between around 700 and 1100 degrees Celsius.

Methods and systems for reducing stiction through roughening the surface and reducing the contact area in MEMS devices are disclosed. A method includes fabricating bumpstops on a surface of a MEMS device substrate to reduce stiction. Another method is directed to applying roughening etchant to a surface of a silicon substrate to enhance roughness after cavity etch and before removal of hardmask. Another embodiment described herein is directed to a method to reduce contact area between proof mass and UCAV (upper cavity) substrate surface with minimal impact on the cavity volume by introducing a shallow etch process step and maintaining high pressure in accelerometer cavity. Another method is described as to increasing the surface roughness of a UCAV substrate surface by depositing a rough layer (e.g. polysilicon) on the surface of the substrate and etching back the rough layer to transfer the roughness.