B81C2203/0109

RESONANCE DEVICE AND RESONANCE DEVICE MANUFACTURING METHOD
20210371273 · 2021-12-02 ·

A resonance device that includes a MEMS substrate that includes a resonator, a top cover having a silicon oxide film on a surface thereof that faces the MEMS substrate, and a bonding part that bonds the MEMS substrate and the top cover to each other so as to seal a vibration space of the resonator. The silicon oxide film includes a through hole that is formed along at least part of the periphery of the vibration space when the top cover is viewed in a plan view and that penetrates to a surface of the top cover. The through hole includes a first metal layer.

METHOD FOR MANUFACTURING A MEMS DEVICE BY FIRST HYBRID BONDING A CMOS WAFER TO A MEMS WAFER

A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

Piezoelectric anti-stiction structure for microelectromechanical systems

Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a first dielectric structure disposed over a first semiconductor substrate, where the first dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the first dielectric structure and includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity. A first piezoelectric anti-stiction structure is disposed between the movable mass and the first dielectric structure, wherein the first piezoelectric anti-stiction structure includes a first piezoelectric structure and a first electrode disposed between the first piezoelectric structure and the first dielectric structure.

REDUCED LIGHT REFLECTION PACKAGE

A MEMS sensor includes a through hole to allow communication with an external environment, such as to send or receive acoustic signals or to be exposed to the ambient environment. In addition to the information that is being measured, light energy may also enter the environment of the sensor via the through hole, causing short-term or long-term effects on measurements or system components. A light mitigating structure is formed on or attached to a lid of the MEMS die to absorb or selectively reflect the received light in a manner that limits effects on the measurements or interest and system components.

STOPPER BUMP STRUCTURES FOR MEMS DEVICE

Various embodiments of the present disclosure are directed towards an integrated chip (IC) including a substrate. A plurality of adhesive structures is disposed on the substrate. A microelectromechanical systems (MEMS) structure is disposed on the adhesive structures. The MEMS structure comprises a movable element disposed within a cavity. A first plurality of stopper bumps is disposed between the movable element and the substrate.

HERMETICALLY SEALED, TOUGHENED GLASS PACKAGE AND METHOD FOR PRODUCING SAME

A hermetically sealed package includes: a base substrate and a cover substrate which define at least part of the package, the base substrate and the cover substrate being hermetically sealed to one another by at least one laser bonding line, the at least one laser bonding line having a height perpendicular to its bonding plane, at least the cover substrate including a toughened layer at its surface, at least on a side opposite the at least one laser bonding line; and at least one functional area enclosed in the package.

PACKAGE STRUCTURE OF MICRO SPEAKER
20220141595 · 2022-05-05 ·

A package structure of a micro speaker includes a substrate, a diaphragm, a coil, a carrier board, a lid, a first permanent magnetic element, and a second permanent magnetic element. The substrate has a hollow chamber. The diaphragm is suspended over the hollow chamber. The coil is embedded in the diaphragm. The carrier board is disposed on the bottom surface of the substrate. The first permanent magnetic element is disposed on the carrier board and in the hollow chamber. The lid is wrapped around the substrate and the diaphragm. The lid exposes a portion of the top surface of the diaphragm. The second permanent magnetic element is disposed either above the lid or under the lid.

MICRO-ELECTROMECHANICAL SYSTEM DEVICE AND METHOD OF FORMING THE SAME
20220140225 · 2022-05-05 ·

A micro-electromechanical system (MEMS) device and a method of forming the same, the MEMS device includes a composite substrate, a cavity, a piezoelectric stacking structure and a proof mass. The composite substrate includes a first semiconductor layer, a bonding layer and a second semiconductor layer from bottom to top. The cavity is disposed in the composite substrate, and the cavity is extended from the second semiconductor layer into the first semiconductor layer and not penetrated the first semiconductor layer. The piezoelectric stacking structure is disposed on the composite substrate, with the piezoelectric stacking structure having a suspended region over the cavity. The proof mass is disposed in the cavity to connect to the piezoelectric stacking structure.

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR THE SAME
20230249961 · 2023-08-10 ·

The present disclosure provides a micro electro mechanical system (MEMS) structure, including a device substrate having a first region and a second region different from the first region, a capping substrate bonded over the device substrate, a first cavity in the first region and between the device substrate and capping substrate, wherein the first cavity has a first cavity pressure, a second cavity in the second region and between the device substrate and capping substrate, wherein the second cavity has a second cavity pressure lower than the first cavity pressure, an outgassing material, wherein the outgassing material includes a top surface and a sidewall exposed to the first cavity, the outgassing material is free from being in direct contact with the capping substrate, wherein the outgassing material includes a trench, and a passivation layer disposed over the device substrate, and is in direct contact with the outgassing material.

Hermetically sealed optically transparent wafer-level packages and methods for making the same
11764117 · 2023-09-19 · ·

Wafer level encapsulated packages includes a wafer, a glass substrate hermetically sealed to the wafer, and an electronic component. The glass substrate includes a glass cladding layer fused to a glass core layer and a cavity formed in the glass substrate. The electronic component is encapsulated within the cavity. In various embodiments, the floor of the cavity is planar and substantially parallel to a plane defined by a top surface of the glass cladding layer. The glass cladding layer has a higher etch rate in an etchant than the glass core layer. In various embodiments, the wafer level encapsulated package is substantially optically transparent. Methods for forming the wafer level encapsulated package and electronic devices formed from the wafer level encapsulated package are also described.