A MEMS package structure and a method for manufacturing same. The MEMS package structure comprises a MEMS die (200) and a device wafer (100). The MEMS die (200) has micro-cavities (211, 221) and contact pads (212, 222) configured to be coupled to an external electrical signal. The micro-cavity (221) of the MEMS die (200) has an opening (221a) in communication with the outside. The device wafer (100) is provided therein with a control unit corresponding to the MEMS die (200). An interconnection structure (300) is provided in the device wafer (100) and is electrically connected to each of the contact pads (212, 222) and the control unit. A rewiring layer (400) electrically connected to the interconnection structure (300) is provided on a second surface of the device wafer (100). The provision of the MEMS die (200) and the rewiring layer (400) respectively on both sides of the device wafer is conductive to reducing the size of the MEMS package structure; various MEMS dies can be integrated on one device wafer, thereby meeting the requirements for the function integration capability of the MEMS package structure in practical application.

A method for forming a packaged electronic die includes forming a plurality of bonding pads on a device wafer. A photoresist layer is deposited over the device wafer and is patterned so as to form a photoresist frame that completely surrounds a device formed on the device wafer. Conductive balls are deposited over the bonding pads. The wafer is cut to form the electronic die and the electronic die is placed over the substrate. The conductive balls are heated and compressed, moving the electronic die closer to the substrate such that the photoresist frame is in direct contact with the substrate or with a landing pad formed on the substrate. Encapsulant material is deposited such that the encapsulant material covers the electronic die and the substrate. The encapsulant material is cured so as to encapsulate the electronic die. The substrate is cut to separate the packaged electronic die.

A micromechanical sensor, including a micromechanical chip having a first micromechanical structure, a first evaluation chip, having a first application-specific integrated circuit, and a second evaluation chip having a second application-specific integrated circuit. The first evaluation chip and the micromechanical chip are situated in a stacked manner, the micromechanical chip being directly electrically conductively connected with the first evaluation chip and the first evaluation chip being directly electrically conductively connected with the second evaluation chip. The first application-specific integrated circuit primarily includes analog circuit elements and the second application-specific circuit primarily includes digital circuit elements.

A hollow package (103) includes a substrate (109), an element (111), a partition wall (113), and a top plate (115) and has one or more closed hollow parts (117) that are covered by the substrate (109), the partition wall (113), and the top plate (115), and the substrate (109), the partition wall (113), and the top plate (115) are sealed with a cured product of a sealing resin composition. The top plate (115) and the partition wall (113) are composed of an organic material, and the thickness of the top plate (115), the thickness of the partition wall (113), the width of the partition wall, and the maximum width of the hollow part (117) are each within respective predetermined ranges. The sealing resin composition comprises (A) an epoxy resin that includes one or more selected from the group consisting of an epoxy resin containing two epoxy groups in the molecule and an epoxy resin containing three or more epoxy resins in the molecule and (B) an inorganic filler.

A micro-electro-mechanical system (MEMS) package structure and a method of fabricating the MEMS package structure. The MEMS package structure includes a MEMS die (210,220) and a device wafer (100). A control unit and an interconnection structure (300) are formed in the device wafer (100), and a first contact pad (410) is formed on a first surface (100a) of the device wafer. The MEMS die (210,220) includes a micro-cavity (221), a second contact pad (201) configured to be coupled to an external electrical signal, and a bonding surface (200a,220a). The micro-cavity (221) of the MEMS die (210,220) is provided with a through hole (221a) in communication with the exterior of the die. The MEMS die (210,220) is bonded to the first surface (100a) by a bonding layer (500), in which an opening (510) is formed. The first contact pad (410) is electrically connected to the second contact pad (201), and a rewiring layer (700) is arranged on a second surface (100b) opposing the first surface (100a). The MEMS package structure allows electrical interconnection between the MEMS die and the device wafer with a reduced package size, compared to those produced by existing integration techniques. In addition, a plurality of MEMS dies of the same or different structures and functions are allowed to be integrated on the same device wafer.

In some implementations a semiconductor die comprises a semiconductor chip. The semiconductor chip comprises a piezoresistive pressure sensor element and at least one capacitive acceleration sensor element. The piezoresistive pressure sensor element is arranged to the side of the capacitive acceleration sensor element. In some implementations, a method for producing a semiconductor die includes applying an insulation layer to the semiconductor wafer. A section of the monocrystalline cover layer may be exposed by structuring the insulation layer. A semiconductor layer having a monocrystalline section and a polycrystalline section may be generated by deposition of a semiconductor material.

A low-profile packaging structure for a microelectromechanical-system (MEMS) resonator system includes an electrical lead having internal and external electrical contact surfaces at respective first and second heights within a cross-sectional profile of the packaging structure and a die-mounting surface at an intermediate height between the first and second heights. A resonator-control chip is mounted to the die-mounting surface of the electrical lead such that at least a portion of the resonator-control chip is disposed between the first and second heights and wire-bonded to the internal electrical contact surface of the electrical lead. A MEMS resonator chip is mounted to the resonator-control chip in a stacked die configuration and the MEMS resonator chip, resonator-control chip and internal electrical contact and die-mounting surfaces of the electrical lead are enclosed within a package enclosure that exposes the external electrical contact surface of the electrical lead at an external surface of the packaging structure.

Examples include a device comprising integrated circuit dies molded into a molded panel. The molded panel has three-dimensional features formed therein, where the three-dimensional features are associated with the integrated circuit dies. To form the three-dimensional features, a feature formation material is deposited, the molded panel is formed, and the feature formation material is removed.

A method for manufacturing a MEMS sensor. The method includes: providing a substrate, applying a support layer onto a back side of the substrate, forming at least one cavity in the substrate in such a way that an access to the back side from the front side is formed, introducing a MEMS structure into the at least one cavity, and fixing the MEMS structure on the support layer.

In one aspect of the disclosure, a semiconductor package is disclosed. The semiconductor package includes a lead frame. A semiconductor die is attached to a first side of the lead frame. A protective shell covers at least a first portion of the first surface of the semiconductor die. The protective shell comprises of ink residue. A layer of molding compound covers an outer surface of the protective shell and exposed portion of the first surface of the semiconductor die. A cavity space is within an inner space of the protective shell and the first portion of the top surface of the semiconductor die.