A semiconductor manufacturing method includes providing a wafer. A layer is formed over a surface of the wafer where the layer is able to form a eutectic layer with a conductive element. The layer is partially removed so as to form a plurality of mesas. The wafer is bonded to a substrate through the plurality of mesas. The substrate is thinned down to a thickness so as to be less than a predetermined value.

A method and system for preparing a semiconductor wafer are disclosed. In a first aspect, the method comprises providing a passivation layer over a patterned top metal on the semiconductor wafer, etching the passivation layer to open a bond pad in the semiconductor wafer using a first mask, depositing a protection layer on the semiconductor wafer, patterning the protective layer using a second mask, and etching the passivation layer to open other electrodes in the semiconductor wafer using a third mask. The system comprises a MEMS device that further comprises a first substrate and a second substrate bonded to the first substrate, wherein the second substrate is prepared by the aforementioned steps of the method.

The present disclosure relates to a MEMS package with a rough metal anti-stiction layer, to improve stiction characteristics, and an associated method of formation. In some embodiments, the MEMS package includes a MEMS IC bonded to a CMOS IC. The CMOS IC has a CMOS substrate and an interconnect structure disposed over the CMOS substrate. The interconnect structure includes a plurality of metal layers disposed within a plurality of dielectric layers. The MEMS IC is bonded to the CMOS IC, enclosing a cavity between the MEMS IC and the CMOS IC and a moveable mass arranged in the cavity. The MEMS package further includes an anti-stiction layer disposed under the moveable mass. The anti-stiction layer is made of metal and has a rough top surface.

This disclosure provides devices and methods for 3-D device packaging with backside interconnections. One or more device elements can be hermetically sealed from an ambient environment, such as by vacuum lamination and bonding. One or more via connections provide electrical interconnection from a device element to a back side of a device substrate, and provide electrical interconnection from the device substrate to external circuitry on the back side of the device. The external circuitry can include a printed circuit board or flex circuit. In some implementations, an electrically conductive pad is provided on the back side, which is electrically connected to at least one of the via connections. In some implementations, the one or more via connections are electrically connected to one or more electrical components or interconnections, such as a TFT or a routing line.

An electro-optical apparatus has an element substrate that is provided with a mirror and a sealing member which seals the mirror, and the sealing member includes a light-transmitting cover which faces the mirror opposite from the element substrate. An infrared cut filter is laminated on the light-transmitting cover.

The present disclosure relates to a MEMS package with a rough metal anti-stiction layer, to improve stiction characteristics, and an associated method of formation. In some embodiments, the MEMS package includes a MEMS IC bonded to a CMOS IC. The CMOS IC has a CMOS substrate and an interconnect structure disposed over the CMOS substrate. The interconnect structure includes a plurality of metal layers disposed within a plurality of dielectric layers. The MEMS IC is bonded to an upper surface of the interconnect structure and, in cooperation with the CMOS IC, enclosing a cavity between the MEMS IC and the CMOS IC. The MEMS IC has a moveable mass arranged in the cavity. The MEMS package further includes an anti-stiction layer disposed on the upper surface of the interconnect structure under the moveable mass. The anti-stiction layer is made of metal and has a rough top surface.

Processes for integrating complementary metal-oxide-semiconductor (CMOS) devices with microelectromechanical systems (MEMS) devices are provided. In some embodiments, the MEMS devices are formed on a sacrificial substrate or wafer, the sacrificial substrate or wafer is bonded to a CMOS die or wafer, and the sacrificial substrate or wafer is removed. In other embodiments, the MEMS devices are formed over a sacrificial region of a CMOS die or wafer and the sacrificial region is subsequently removed. Integrated circuit (ICs) resulting from the processes are also provided.

A method and system for changing a pressure within at least one enclosure in a MEMS device are disclosed. In a first aspect, the method comprises applying a laser through one of the at least two substrates onto a material which changes the pressure within at least one enclosure when exposed to the laser, wherein the at least one enclosure is formed by the at least two substrates. In a second aspect, the system comprises a MEMS device that includes a first substrate, a second substrate bonded to the first substrate, wherein at least one enclosure is located between the first and the second substrates, a metal layer within one of the first substrate and the second substrate, and a material vertically oriented over the metal layer, wherein when the material is heated the material changes a pressure within the at least one enclosure.

The present subject matter relates to systems and methods for arranging and controlling programmable combinations of tuning elements in which more than one form of switching technology is combined in a single array. Specifically, such an array can include one or more first switchable elements including a first switching technology (e.g., one or more solid-state-controlled devices) and one or more second switchable elements including a second switching technology that is different than the first switching technology (e.g., one or more micro-electro-mechanical capacitors). The one or more first switchable elements and the one or more second switchable elements can be configured, however, to deliver a combined variable reactance.

A sensor package and a method for producing a sensor package are disclosed. In an embodiment a method for producing a sensor package includes providing a carrier including electric conductors, fastening a dummy die or interposer to the carrier, providing an ASIC device including an integrated sensor element and fastening the ASIC device to the dummy die or interposer.