There is provided a substrate processing device. This substrate processing device includes a substrate holder that holds and rotates a substrate, a first processing head that processes a first plane of the substrate held on the substrate holder, and a second processing head that processes a peripheral portion of the substrate held on the substrate holder.

A polishing apparatus is configured to polish a peripheral edge of an object. The apparatus includes: a stage having a mounting surface to mount the object; a polishing head configured to press a polishing surface against the peripheral edge and polish the peripheral edge; a first inlet configured to supply liquid to the polishing surface; and a protector having a first surface extending along a first direction intersecting with the mounting surface, the first surface having an opening between the stage and the polishing head in a second direction intersecting with the first direction.

A substrate processing apparatus includes: a holding portion configured to hold a substrate including a bevel and an end surface in a peripheral edge portion of the substrate; a rotator configured to rotate the holding portion; a polishing head configured to be brought into contact with the peripheral edge portion of the substrate held by the holding portion and to polish the peripheral edge portion of the substrate; and a holder to which the polishing head is installed.

There is disclosed a substrate processing apparatus which can align a center of a substrate, such as a wafer, with a central axis of a substrate stage with high accuracy. The substrate processing apparatus includes: an eccentricity detector configured to obtain an amount of eccentricity and an eccentricity direction of a center of the substrate, when held on a centering stage, from a central axis of the centering stage; and an aligner configured to perform a centering operation of moving and rotating the centering stage until the center of the substrate on the centering stage is located on a central axis of a processing stage. The aligner is configured to calculate a distance by which the centering stage is to be moved and an angle through which the centering stage is to be rotated, based on an initial relative position of the central axis of the centering stage with respect to the central axis of the processing stage, the amount of eccentricity, and the eccentricity direction.

A substrate processing apparatus includes: a holding portion configured to hold a substrate including a bevel and an end surface in a peripheral edge portion of the substrate; a rotator configured to rotate the holding portion; a polishing head configured to be brought into contact with the peripheral edge portion of the substrate held by the holding portion and to polish the peripheral edge portion of the substrate; and a holder to which the polishing head is installed.

A method for processing a silicon wafer, the method including cutting an ingot to form a wafer, extracting from measured shape data a cross-sectional profile, the cross-sectional profile passing through the center of the wafer and being aligned with a cutting direction of an ingot, interpolating the shape data with a fixed and pre-determined step size, fitting a first second-degree polynomial to the cross-sectional profile, determining a residual profile by subtracting the polynomial from the cross-sectional profile, fitting a second second-degree polynomial to the residual profile using a sliding window of pre-determined width to determine a position, height, and curvature of each peak and valley of the residual profile, determining a waviness parameter based on the position, height, and curvature of each peak and valley of the residual profile, and further processing the wafer based on the waviness parameter and a predetermined waviness threshold.

There is provided a method for manufacturing a semiconductor device, including: attracting a semiconductor device wafer by a chuck mechanism and rotating the semiconductor device wafer horizontally; rotating a rotary blade horizontally by a vertical spindle to which ultrasonic waves are applied; trimming an outer peripheral end portion of the semiconductor device wafer that is horizontally rotating by the rotary blade that is horizontally rotating, to form a groove in the outer peripheral end portion; correcting a tip shape of the rotary blade that is horizontally rotating by a blade-forming grinding wheel during the trimming; and grinding one main surface of the semiconductor device wafer that is horizontally rotating by a cup grinding wheel that is horizontally rotating after the trimming.

Provided is a method of chamfer machining a silicon wafer which makes it possible to increase the number of machining operations that can be performed using a chamfering wheel used for helical chamfer machining in the case of obtaining a small finished wafer taper angle. The method in which helical chamfer machining is performed so that the finished wafer taper angle θ of an edge portion in the one silicon wafer is within an allowable angle range of a target wafer taper angle θ.sub.0 includes a first truing step; a first chamfer machining step; a step of determining a groove bottom diameter ϕ.sub.A of the fine grinding grindstone portion; a second truing step using a second truer taper angle α.sub.2; and a second chamfer machining step. The second truer taper angle α.sub.2 is made larger than the first truer taper angle α.sub.1.

The wafer trimming device includes a chuck table configured to hold a target wafer via suction, thereby fixing the target wafer, a notch trimmer configured to trim a notch of the target wafer, and an edge trimmer configured to trim an edge of the target wafer. The notch trimmer includes a notch trimming blade configured to rotate about a rotation axis perpendicular to a circumferential surface of the target wafer. The edge trimmer includes an edge trimming blade configured to rotate about a rotation axis parallel to the circumferential surface of the target wafer.

A semiconductor substrate includes a gallium oxide-based semiconductor single crystal and a chamfered portion at an outer periphery portion. The chamfered portion includes a first inclined surface located on the outer side of a first principal surface of the semiconductor substrate and being linear at an edge in a vertical cross section of the semiconductor substrate, a second inclined surface located on the outer side of a second principal surface on the opposite side to the first principal surface and being linear at an edge in the vertical cross section, and an end face located between the first inclined surface and the second inclined surface at a leading end of the chamfered portion. A width of the end face in a thickness direction of the semiconductor substrate is within the range of not less than 50% and not more than 97% of a thickness of the semiconductor substrate.