Patent classifications
B24B37/22
Additive Manufacturing of Polishing Pads
Interpenetrating polymer networks (IPNs) for a forming polishing pad for a semiconductor fabrication operation are disclosed. Techniques for forming the polishing pads are provided. In an exemplary embodiment, a polishing pad includes an interpenetrating polymer network formed from a free-radically polymerized material and a cationically polymerized material.
Polishing pad with pad wear indicator
The invention provides a polishing pad suitable for polishing integrated circuit wafers. A polyurethane polishing layer has a top surface and at least one groove in the polyurethane polishing layer. At least one copolymer wear detector located within the polyurethane polishing layer detects wear of the polishing layer adjacent the at least one groove. The at least one wear detector includes two regions, a first region being a fluorescent acrylate/urethane copolymer linked with a UV curable linking group and a second non-fluorescent region, The wear detector allows detecting wear of the polishing layer.
Polishing pad with pad wear indicator
The invention provides a polishing pad suitable for polishing integrated circuit wafers. A polyurethane polishing layer has a top surface and at least one groove in the polyurethane polishing layer. At least one copolymer wear detector located within the polyurethane polishing layer detects wear of the polishing layer adjacent the at least one groove. The at least one wear detector includes two regions, a first region being a fluorescent acrylate/urethane copolymer linked with a UV curable linking group and a second non-fluorescent region, The wear detector allows detecting wear of the polishing layer.
POLISHING PAD, MANUFACTURING METHOD THEREOF, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING SAME
The present disclosure relates to a polishing pad, a method for manufacturing the polishing pad, and a method for manufacturing a semiconductor device using the polishing pad. The polishing pad increases the area in direct contact with the semiconductor substrate during the polishing process and can prevent defects occurring on the surface of the semiconductor substrate by forming a plurality of uniform pores in the polishing layer, thereby adjusting the surface roughness characteristics of the polishing surface of the polishing layer. Further, the present disclosure may provide a method for manufacturing a semiconductor device to which the polishing pad is applied.
POLISHING PAD, MANUFACTURING METHOD THEREOF, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING SAME
The present disclosure relates to a polishing pad, a method for manufacturing the polishing pad, and a method for manufacturing a semiconductor device using the polishing pad. The polishing pad increases the area in direct contact with the semiconductor substrate during the polishing process and can prevent defects occurring on the surface of the semiconductor substrate by forming a plurality of uniform pores in the polishing layer, thereby adjusting the surface roughness characteristics of the polishing surface of the polishing layer. Further, the present disclosure may provide a method for manufacturing a semiconductor device to which the polishing pad is applied.
CHEMICAL-MECHANICAL POLISHING SUBPAD HAVING POROGENS WITH POLYMERIC SHELLS
A subpad for a chemical-mechanical polishing pad, the subpad having porogens with polymeric shells. Methods of fabricating the subpad and polishing pads with a polishing surface layer bonded to the subpad layer are also described.
POLISHING PAD SHEET, POLISHING PAD, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A polishing pad sheet which provides optimized interfacial properties for the laminated structure of a polishing pad based on appropriate elasticity and high durability, and in which the polishing pad having the polishing pad sheet applied thereto not only has its intrinsic function such as the polishing rate or the like, but also is capable of realizing the function without damage even during the polishing process in a wet environment for a long time, and a polishing pad to which the polishing pad sheet is applied. The polishing pad sheet includes: a first surface which is a polishing layer attachment surface; and a second surface which is a rear surface of the first surface, wherein the first surface has a value of the following Equation 1 of 4.20 to 5.50: 4.20≤(|Sv|)/Sz×P (%)≤5.50.
POLISHING PAD SHEET, POLISHING PAD, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A polishing pad sheet which provides optimized interfacial properties for the laminated structure of a polishing pad based on appropriate elasticity and high durability, and in which the polishing pad having the polishing pad sheet applied thereto not only has its intrinsic function such as the polishing rate or the like, but also is capable of realizing the function without damage even during the polishing process in a wet environment for a long time, and a polishing pad to which the polishing pad sheet is applied. The polishing pad sheet includes: a first surface which is a polishing layer attachment surface; and a second surface which is a rear surface of the first surface, wherein the first surface has a value of the following Equation 1 of 4.20 to 5.50: 4.20≤(|Sv|)/Sz×P (%)≤5.50.
Chemical mechanical polishing apparatus and method
The present disclosure describes a method and apparatus to remove consumable (e.g., sacrificial) polishing pad layers from a multilayer polishing pad. For example, the method includes measuring a thickness profile of a top polishing pad layer of a multilayer polishing pad and comparing the thickness profile to a threshold. The method, in response to the thickness profile being above the threshold, rinses the top polishing pad layer of the multilayer polishing pad and removes, after the top polishing pad layer has been rinsed, the top polishing pad layer to expose an underlying polishing pad layer of the multilayer polishing pad.
Chemical mechanical polishing apparatus and method
The present disclosure describes a method and apparatus to remove consumable (e.g., sacrificial) polishing pad layers from a multilayer polishing pad. For example, the method includes measuring a thickness profile of a top polishing pad layer of a multilayer polishing pad and comparing the thickness profile to a threshold. The method, in response to the thickness profile being above the threshold, rinses the top polishing pad layer of the multilayer polishing pad and removes, after the top polishing pad layer has been rinsed, the top polishing pad layer to expose an underlying polishing pad layer of the multilayer polishing pad.