Patent classifications
B29D11/00346
Fabrication of optical metasurfaces
The method is provided for fabricating an optical metasurface. The method may include depositing a conductive layer over a holographic region of a wafer and depositing a dielectric layer over the conducting layer. The method may also include patterning a hard mask on the dielectric layer. The method may further include etching the dielectric layer to form a plurality of dielectric pillars with a plurality of nano-scale gaps between the pillars.
Control circuitry for 2D optical metasurfaces
A 2D hologram system with a matrix addressing scheme is provided. The system may include a 2D array of sub-wavelength hologram elements integrated with a refractive index tunable core material on a wafer substrate. The system may also include a matrix addressing scheme coupled to the 2D array of sub-wavelength hologram elements and configured to independently control each of the sub-wavelength hologram elements by applying a voltage.
FABRICATION OF OPTICAL METASURFACES
The method is provided for fabricating an optical metasurface. The method may include depositing a conductive layer over a holographic region of a wafer and depositing a dielectric layer over the conducting layer. The method may also include patterning a hard mask on the dielectric layer. The method may further include etching the dielectric layer to form a plurality of dielectric pillars with a plurality of nano-scale gaps between the pillars.
Micro-molded sheet for backlight module
A micro-molded sheet for backlight module, includes: a base material layer formed from transparent material; a coating, which comprises adhesive and nano-particles, formed on the upper surface of the base material layer; and a micro-molded array layer mounted on the upside of the coating.
Control circuitry for 1D optical metasurfaces
A hologram system may include a hologram chip comprising a wafer substrate having a first plurality of conductive pads on a hologram surface region connected to a second plurality of conductive pads on an interconnect surface region. The hologram chip may also include an array of sub-wavelength hologram elements integrated with a refractive index tunable core material on the hologram region of the wafer substrate. The hologram system may also include a control circuit chip having a third plurality of conductive pads connected to the second plurality of conductive pads on the interconnect region of the wafer substrate. The interconnect region is on the same side of the wafer substrate as the hologram region. The first plurality of conductive pads is directly connected to the array of sub-wavelength hologram elements.
SEMI-FINISHED OPTICAL ELEMENT FOR MANUFACTURING AN OPHTHALMIC ARTICLE, OPHTHALMIC ARTICLE AND RELATED MANUFACTURING METHOD
A semi-finished optical element for manufacturing an ophthalmic article for vision-correction including at least one blank having a front diopter and a rear diopter, the blank being configured to present a first optical power distribution, one of the diopters being unfinished and the other being finished, an optical component layer including a periodic or pseudo-periodic arrangement of optical wave-front shaping elements that are smaller than 10 ?m and configured to control incoming light at least in a part of the visible spectrum and providing a second optical power distribution, wherein the optical component layer is transparent in transmission in the visible wavelength and is disposed on the finished diopter of the blank for cooperating together to achieve a third optical power distribution.
OPTICALLY ACTIVE MATERIAL SETS
An optically active material set can include a particulate build material including polymer particles having an average particle size from 10 m to 100 m, wherein the particulate build material as a whole has a transparency from 85% to 100%. The material set can further include an inkjettable fluid for application to the build material for 3D printing, wherein the inkjettable fluid may include dielectric nanoparticles having an average particle size from 1 nm to 100 nm.
Laminate Structure with Embedded Cavities and Related Method of Manufacture
An integrated laminate structure adapted for application in the context of solar technology, wafer technology, cooling channels, greenhouse illumination, window illumination, street lighting, traffic lighting, traffic reflectors or security films, includes a first carrier element such as a piece of plastic or glass, optionally having optically substantially transparent material enabling light transmission therethrough, a second carrier element provided with at least one surface relief pattern including a number of surface relief forms and having at least one predetermined optical function relative to incident light, the second carrier element optionally including optically substantially transparent material enabling light transmission therethrough, the first and second carrier elements being laminated together such that the at least one surface relief pattern has been embedded within the established laminate structure and a number of related cavities have been formed at the interface of the first and second carrier elements. An applicable method of manufacture is presented.
LENS AND METHOD FOR MAKING THE SAME
An uncoated lens with anti-reflective, non-fouling, and water-repelling characteristics comprises a lens body and nanosized structures. The lens body comprises a front surface and a rear surface. The front surface and the rear surface are opposite to each other. The nanosized structures are positioned on the front surface. The nanosized structures and the lens body are integrally formed by a molding process. The nanosized structures comprise a plurality of protrusions. A size of each protrusion is smaller than a wavelength of visible light.
Fabrication of optical metasurfaces
The method is provided for fabricating an optical metasurface. The method may include depositing a conductive layer over a holographic region of a wafer and depositing a dielectric layer over the conducting layer. The method may also include patterning a hard mask on the dielectric layer. The method may further include etching the dielectric layer to form a plurality of dielectric pillars with a plurality of nano-scale gaps between the pillars.