In described examples, a first metal layer is arranged along a periphery of a cavity to be formed between a first substrate and a second substrate. A second metal layer is arranged adjacent to the first metal layer, where the second metal layer includes a cantilever. The cantilever is arranged to deform in response to forces applied from a contacting structure of the second substrate during bonding of the first substrate to the second substrate. The deformed cantilevered is arranged to impede contaminants against contacting an element within the cavity.

A multi-layer sealing film for high seal yield is provided. In some embodiments, a substrate comprises a vent opening extending through the substrate, from an upper side of the substrate to a lower side of the substrate. The upper side of the substrate has a first pressure, and the lower side of the substrate has a second pressure different than the first pressure. The multi-layer sealing film covers and seals the vent opening to prevent the first pressure from equalizing with the second pressure through the vent opening. Further, the multi-layer sealing film comprises a pair of metal layers and a barrier layer sandwiched between metal layers. Also provided is a microelectromechanical systems (MEMS) package comprising the multilayer sealing film, and a method for manufacturing the multi-layer sealing film.

A method of processing a double sided wafer of a microelectromechanical device includes spinning a resist onto a first side of a first wafer. The method further includes forming pathways within the resist to expose portions of the first side of the first wafer. The method also includes etching one or more depressions in the first side of the first wafer through the pathways, where each of the depressions have a planar surface and edges. Furthermore, the method includes depositing one or more adhesion metals over the resist such that the one or more adhesion metals are deposited within the depressions, and then removing the resist from the first wafer. The method finally includes depositing indium onto the adhesion metals deposited within the depressions and bonding a second wafer to the first wafer by compressing the indium between the second wafer and the first wafer.

A method for setting a pressure in a cavity formed with the aid of a substrate and a substrate cap, a microelectromechanical system being situated in the cavity, the substrate including a main extension plane. The method includes the following steps: in a first step a clearance is created in the substrate cap, the clearance connecting the cavity to the surroundings, a first clearance end of the clearance being formed on a first surface of the substrate cap that faces away from the cavity, a second clearance end of the clearance being formed on a cavity-side second surface of the substrate cap, the first clearance end and the second clearance end being situated at a distance from one another at least in a first direction which is parallel to the main extension plane; in a second step, after the first step, the clearance is sealed.

A packaged pressure sensor, comprising: a MEMS pressure-sensor chip; and an encapsulating layer of elastomeric material, in particular PDMS, which extends over the MEMS pressure-sensor chip and forms a means for transferring a force, applied on a surface thereof, towards the MEMS pressure-sensor chip.

In described examples, a cavity is formed between a substrate and a cap. One or more access holes are formed through the cap for removing portions of a sacrificial layer from within the cavity. A cover is supported by the cap, where the cover is for occulting the one or more access holes along a perspective. An encapsulant seals the cavity, where the encapsulant encapsulates the cover and the one or more access holes.

An electronic device includes a package substrate, a circuit assembly, and a housing. The circuit assembly is mounted on the package substrate. The circuit assembly includes a first sealed cavity formed in a device substrate. The housing is mounted on the package substrate to form a second sealed cavity about the circuit assembly.

A method of processing a double sided wafer of a microelectromechanical device includes spinning a resist onto a first side of a first wafer. The method further includes forming pathways within the resist to expose portions of the first side of the first wafer. The method also includes etching one or more depressions in the first side of the first wafer through the pathways, where each of the depressions have a planar surface and edges. Furthermore, the method includes depositing one or more adhesion metals over the resist such that the one or more adhesion metals are deposited within the depressions, and then removing the resist from the first wafer. The method finally includes depositing indium onto the adhesion metals deposited within the depressions and bonding a second wafer to the first wafer by compressing the indium between the second wafer and the first wafer.

An electronic component includes a piezoelectric substrate, a first functional element, a first wiring, insulating films, a first conductive film, and a first external connection terminal. The first functional element is disposed on the piezoelectric substrate. The first wiring is disposed on the piezoelectric substrate, and is electrically connected to the first functional element. The insulating films are disposed on the piezoelectric substrate, and define a first hollow portion in which the first functional element is included. The first conductive film is disposed on the insulating films, and has a portion that passes through the insulating films and is electrically connected to the first wiring. The first external connection terminal is provided on the first conductive film, and is disposed at a position overlapping at least a portion of the first functional element in a plan view as viewed in the thickness direction of the piezoelectric substrate.

An electrical component package includes a glass substrate, an interposer panel positioned on the glass substrate, the interposer panel comprising a device cavity, a wafer positioned on the interposer panel such that the device cavity is enclosed by the glass substrate, the interposer panel, and the wafer. The electrical component package further includes a metal seed layer disposed between the interposer panel and the wafer, and a dielectric coating. The dielectric coating hermetically seals the interposer panel to the glass substrate, the interposer panel to the metal seed layer and the wafer, and the interposer panel hermetically seals the metal seed layer to the glass substrate such that the device cavity is hermetically sealed from ambient atmosphere.