The present disclosure provides a semiconductor structure and a method for fabricating semiconductor structure. The semiconductor structure includes a first device, configured to be a complementary metal oxide semiconductor device, wherein the first device includes a substrate, a multi-layer structure disposed on the substrate, a first hole, defined between a first end with a first circumference and a second end with a second circumference, a second hole, aligned to the first hole and defined between the second end and a third end with a third circumference, wherein the third circumference is larger than the first circumference and the second circumference, and a second device, configured to be a micro-electro mechanical system device and bonded to the first device, wherein a first chamber is between the first device and the second device, and the first end links with the first chamber, and a sealing object configured to seal the second hole.

A semiconductor device includes a substrate, a movable portion provided on the substrate, a junction frame provided on the substrate to surround the movable portion, a cap bonded to the junction frame, the cap having a recessed portion and covering a space over the movable portion with the recessed portion facing the movable portion, the cap having an inside wall provided with irregularities, and a prevention film formed on the inside wall of the cap, the prevention film having irregularities on a surface thereof.

A semiconductor structure includes: a first device; a second device contacted with the first device, wherein a chamber is formed between the first device and the second device; a first hole disposed in the second device and defined between a first end with a first circumference and a second end with a second circumference; a second hole disposed in the second device and aligned to the first hole; and a sealing object for sealing the second hole. The first end links with the chamber, and the first circumference is different from the second circumference, the second hole is defined between the second end and a third end with a third circumference, and the second circumference and the third circumference are smaller than the first circumference.

An ultrasonic sensor includes: an element storage case including a case-side diaphragm having a thickness direction along a directional axis; and an ultrasonic element accommodated in the element storage case and spaced apart from the case-side diaphragm. The ultrasonic element includes an element-side diaphragm having the thickness direction along the directional axis and provided by a thin part of a semiconductor substrate. The semiconductor substrate is arranged to provide a closed space between the case-side diaphragm and the element-side diaphragm. The semiconductor substrate is fixed and supported by the element-storage case.

There is provided a micro electrical mechanical systems device package comprising: a first vacuum enclosure comprising a first enclosure wall; a micro electrical mechanical systems device being positioned within the first vacuum enclosure on a first side of the first enclosure wall; and a second vacuum enclosure, the second side of the first enclosure wall being within the second vacuum enclosure. Advantageously, the first vacuum enclosure is entirely within the second vacuum enclosure.

Aspects of the present disclosure describe systems, methods, and structures that enable a compact, UHV ion trap system that can operate at temperatures above cryogenic temperatures. Ion trap systems in accordance with the present disclosure are surface treated and sealed while held in a UHV environment, where disparate components are joined via UHV seals, such as weld joints, compressible metal flanges, and UHV-compatible solder joints. As a result, no cryogenic pump is required, thereby enabling an extremely small-volume system.

An electronic component includes a piezoelectric substrate, a first functional element, a first wiring, insulating films, a first conductive film, and a first external connection terminal. The first functional element is disposed on the piezoelectric substrate. The first wiring is disposed on the piezoelectric substrate, and is electrically connected to the first functional element. The insulating films are disposed on the piezoelectric substrate, and define a first hollow portion in which the first functional element is included. The first conductive film is disposed on the insulating films, and has a portion that passes through the insulating films and is electrically connected to the first wiring. The first external connection terminal is provided on the first conductive film, and is disposed at a position overlapping at least a portion of the first functional element in a plan view as viewed in the thickness direction of the piezoelectric substrate.

A Micro-Electro-Mechanical System (MEMS) device includes a substrate, a packaging component provided on the substrate and a MEMS component provided inside the packaging component and on the substrate. The device further includes a sealing component. The sealing component is provided on the substrate and/or the packaging component, for preventing an external small molecule from contacting with the MEMS component.

The present disclosure provides a packaging method, including: providing a first semiconductor substrate; forming a bonding region on the first semiconductor substrate, wherein the bonding region of the first semiconductor substrate includes a first bonding metal layer and a second bonding metal layer; providing a second semiconductor substrate having a bonding region, wherein the bonding region of the second semiconductor substrate includes a third bonding layer; and bonding the first semiconductor substrate to the second semiconductor substrate by bringing the bonding region of the first semiconductor substrate in contact with the bonding region of the second semiconductor substrate; wherein the first and third bonding metal layers include copper (Cu), and the second bonding metal layer includes Tin (Sn). An associated packaging structure is also disclosed.

A MEMS device manufacturing method and a MEMS device are provided which can enhance a degree of vacuum inside an operation space and reduce the installation cost and maintenance cost of a manufacturing apparatus as well as manufacturing cost. A MEMS device includes a MEMS device wafer having an operation element formed on a Si substrate, and a CAP wafer provided to cover the MEMS device wafer to form an operation space for operably accommodating the operation element. The CAP wafer is made of silicon and includes vent holes formed to communicate with the operation space. The operation space is sealed by performing a heat treatment in a hydrogen gas atmosphere to close the vent holes by silicon surface migration of the CAP wafer with the CAP wafer and the MEMS device wafer bonded.