A method for fabricating a semiconductor device is disclosed. A semiconductor substrate comprising a MOS transistor is provided. A MEMS device is formed over the MOS transistor. The MEMS device includes a bottom electrode in a second topmost metal layer, a diaphragm in a pad metal layer, and a cavity between the bottom electrode and the diaphragm.

A shielded semiconductor device is assembled using a lead frame having a die receiving area, leads disposed around the die receiving area, and a bendable strip formed in the die receiving area. Each lead has an inner lead end that is spaced from but near to one of the sides of the die receiving area and an outer lead end that is distal to that side of the die receiving area. An IC die is attached to the die receiving area and electrically connected to the inner lead ends of the leads. An encapsulant is formed over the die and the electrical connections and forms a body. The strip is bent to extend vertically to a top side of the body. A lid is formed on the top side of the body and is in contact with a distal end of the vertical strip.

A semiconductor sensor device includes a lead frame flag having a vent hole, an interposer mounted on the flag and having a vent hole in fluid communication with the vent hole of the flag, and a sensor die having an active region. The sensor die is mounted on and electrically connected to the interposer in a flip-chip manner such that the vent hole of the interposer is in fluid communication with the active region of the sensor die. Bond wires electrically connect the interposer to one or more other components of the device. A molding compound covers the sensor die, the interposer, and the bond wires. The sensor die may be a pressure-sensing (P-cell) die, and the device may also include a micro-controller unit (MCU) die and an acceleration-sensing (G-cell) die, for tire pressure monitoring applications.

A mixed-signal multi-chip package comprises a lead frame, a first die, and a digital die. The first die can provide an analog signal in an analog chip pad of the first die. The digital die can receive the analog signal from the first die through an analog chip pad. The analog input chip pad is coupled with the respective analog output chip pad of the first die by a first bonding wire. The digital die is configured to communicate with external circuitry using a digital signal-bearing signal exchanged via at least one first bond pad of the lead-frame. A second bond pad of the lead frame configured to be coupled to a DC voltage extends laterally along a plane of the lead-frame between the first bond pad and the first bonding wire, to form a DC guard between the first bond pad and the first bonding wire.

The present disclosure relates to a wafer-level fan-out package that includes a first thinned die, a second die, a multilayer redistribution structure underneath the first thinned die and the second die, a first mold compound over the second die, a second mold compound over the multilayer redistribution structure, and around the first thinned die and the second die, and a third mold compound. The second mold compound extends beyond the first thinned die to define an opening within the second mold compound and over the first thinned die, such that a top surface of the first thinned die is at a bottom of the opening. A top surface of the first mold compound and a top surface of the second mold compound are coplanar. The third mold compound fills the opening and is in contact with the top surface of the first thinned die.

A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.

Various embodiments of the present disclosure are directed towards a method for forming an integrated chip including an epitaxial layer overlying a microelectromechanical systems (MEMS) substrate. The method includes bonding a MEMS substrate to a carrier substrate, the MEMS substrate includes monocrystalline silicon. An epitaxial layer is formed over the MEMS substrate, the epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts are formed over the epitaxial layer, the plurality of contacts respectively form ohmic contacts with the epitaxial layer.

A sensor device including a leadframe is disclosed. A sensor chip is arranged on the leadframe, an encapsulation material is arranged on a main surface and a side surface of the sensor chip, and a signal port arranged at a side surface of the sensor device. The side surface of the sensor device extends between opposing main surfaces of the sensor device, wherein one of the main surfaces is a mounting surface of the sensor device. A channel extends from the signal port to a sensing structure of the sensor chip.

A terminal assembly structure of a MEMS microphone, including a signal let out board disposed at a terminal and a silicon microphone disposed at the signal let out board. The silicon microphone includes a housing, a substrate forming an accommodation space with the housing, and an MEMS chip accommodated in the accommodation space. A position of the substrate corresponding to the MEMS chip is disposed with a sound inlet connected to the outside, wherein a position where the signal let out board corresponding to the silicon microphone is disposed with an accommodation hole. The housing is accommodated in the accommodation hole. The substrate abuts a surface of the signal let out board and covers the accommodation hole. A surface of the substrate disposed with the housing is provided with a pad which is electrically connected with the signal let out board.

A device includes a sensor die, an electrical coupling, a substrate, and a housing unit. The sensor die is coupled to the substrate via the electrical coupling. The housing unit and the substrate are configured to house the sensor die and the electrical coupling. The housing unit comprises an opening that exposes the sensor die to an environment external to the housing unit. The housing unit may include a drainage configured to drain liquid, e.g., water, oil, etc., out from an interior environment of the housing unit to the environment external to the housing unit. In some embodiments the housing unit comprises a membrane barrier exposing the sensor die to an environment external to the housing unit while preventing liquid from the environment external to enter an interior environment of the housing unit. It is appreciated that in some embodiments, the membrane barrier may be porous and may be ePTFE.