B81C1/00095

METHOD OF MANUFACTURING MEMS DEVICE AND MEMS DEVICE
20190036006 · 2019-01-31 ·

Provided is a method of manufacturing a MEMS device including forming, in a metal layer, an opening that enables a first space and a second space to communicate with each other by exposing the metal layer to an etching solution in a state where the metal layer is left at a boundary between the first space and the second space, and covering an inner surface of an opening of each of an adhesive layer and the metal layer by forming a protective layer from an inner surface of the first space to an inner surface of the second space after the opening of the metal layer is formed.

Epi-poly etch stop for out of plane spacer defined electrode
10173887 · 2019-01-08 · ·

A device with an out-of-plane electrode includes a device layer positioned above a handle layer, a first electrode defined within the device layer, a cap layer having a first cap layer portion spaced apart from an upper surface of the device layer by a gap, and having an etch stop perimeter defining portion defining a lateral edge of the gap, and an out-of-plane electrode defined within the first cap layer portion by a spacer.

MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) STRUCTURE AND METHOD FOR FORMING THE SAME

A method for forming a micro-electro-mechanical system (MEMS) device structure is provided. The MEMS device structure includes a micro-electro-mechanical system (MEMS) substrate, and a substrate formed over the MEMS substrate. The substrate includes a semiconductor via through the substrate. The MEMS device structure includes a dielectric layer formed over the substrate and a polymer layer formed on the dielectric layer. The MEMS device structure also includes a conductive layer formed in the dielectric layer and the polymer layer. The conductive layer is electrically connected to the semiconductor via, and the polymer layer is between the conductive layer and the dielectric layer.

BIOSENSOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
20180354781 · 2018-12-13 ·

A biosensor package structure is provided. The biosensor package structure includes a protection layer and a redistribution layer disposed over the protection layer. The protection layer has a plurality of openings exposing the redistribution layer. The biosensor package structure includes at least one die disposed over the protection layer and the redistribution layer, a plurality of pads disposed on a lower surface of the die, and a plurality of vias disposed between the pads and the redistribution layer. The biosensor package structure includes a dielectric material disposed over the protection layer and the redistribution layer and adjacent to the die, pads and vias. The biosensor package structure further includes at least one biosensing region at the top portion of the die. The top surfaces of the pads are disposed at a level that is lower than the top surface of the biosensing region and higher than the bottom surface of the die.

MEMS sensor cap with multiple isolated electrodes
10087070 · 2018-10-02 · ·

The cap wafer for a MEMS device includes multiple electrically isolated electrodes that can be bonded and electrically connected to separate electrical contacts on a MEMS device wafer. The electrically isolated electrodes can be used for any of a variety of functions, such as for apply a force to a movable MEMS structure on the MEMS device wafer (e.g., for driving resonance of the movable MEMS structure or for adjusting a resonance or sense mode of the movable MEMS structure) or for sensing motion of a movable MEMS structure on the MEMS device wafer. Since the electrodes are electrically isolated, different electrodes may be used for different functions.

MEMS ELEMENT, OPTICAL SCANNING DEVICE, AND DISTANCE MEASURING DEVICE
20240317577 · 2024-09-26 · ·

An optical scanning device, which is a MEMS element, includes a first insulating layer, a first semiconductor layer, a second insulating layer, and a second semiconductor layer that are laminated in this order, a first doped region formed at an interface between the first insulating layer and the first semiconductor layer, a second doped region formed at an interface between the first semiconductor layer and the second insulating layer, and a first wiring portion and a second wiring portion disposed on the first insulating layer apart from each other. The first doped region and the second doped region are electrically connected in parallel between the first wiring portion and the second wiring portion.

LOCALIZED AND LOW TEMPERATURE PLANARIZATION OF DIELECTRIC
20240304732 · 2024-09-12 ·

A method for fabricating a device includes the following steps: fabricating at least one first microstructure and one second microstructure on the substrate, fabricating a connection microstructure making it possible to electrically connect at least the first microstructure to the second microstructure by fabricating a support made of dielectric material by solidifying, by means of a lithography method, a part of a deposited resin layer and by depositing a first metallic layer on at least a part of the support comprising at least a part linking the first microstructure and the second microstructure.

Device having element electrode connected to penetrating wire, and method for manufacturing the same

According to a method for manufacturing a device in which an electrode of an element is electrically connected to a penetrating wire in a substrate, a structure is prepared in which the element is arranged on the first substrate having a through hole formed therein: and a second substrate is prepared which has an electroconductive seed layer formed thereon. Then, a wall part is formed on the first substrate; a seed layer is joined to a face on an element side of the structure through a bonding layer; the bonding layer is removed; and the seed layer is exposed in the inside of the opening. The inside of the wall part and the through hole is filled with a conductor, with the use of the seed layer through electrolytic plating.

Pseudo SOI process
10053360 · 2018-08-21 · ·

A method of processing a semiconductor substrate having a first conductivity type includes, in part, forming a first implant region of a second conductivity type in the semiconductor substrate where the first implant region is characterized by a first depth, forming a second implant region of the first conductivity type in the semiconductor substrate where the second implant region is characterized by a second depth smaller than the first depth, forming a porous layer within the semiconductor substrate where the porous layer is adjacent the first implant region, and growing an epitaxial layer on the semiconductor substrate thereby causing the porous layer to collapse and form a cavity.

MICROELECTROMECHANICAL DEVICE AND METHOD FOR MANUFACTURING IT
20180230002 · 2018-08-16 ·

A device and method utilizes interconnecting layers separated by an insulating layer. A layered structure comprises a first and a second layer of electrically conductive material, and a third layer of electrically insulating material between them. A via trench is fabricated that extends from the second layer through the third layer into the first layer, a surface on the first layer of electrically conductive material forming a bottom surface of the via trench. An ink-jetting set-up for a mixture of liquid carrier and nanoparticles of conductive material is formed, and a specific process period is determined. Capillary flow of nanoparticles to peripheral edges of an ink-jetted blob of said mixture is induced. The mixture is ink-jetted into a blob on the via trench; the layered structure is heated to evaporate the liquid carrier. The interconnection element is higher at a certain point than between opposing side walls.