The invention provides a method for preparing a MEMS conductive part and a conductive coating. A conductive unit includes a fixed member, a moving member which can reciprocate relative to the fixed member, and a plurality of groups of conductive electroplating layers which are electrically connected with the moving member and the fixed member, the moving member includes a first wall and a second wall connected with the first wall, and the fixed member includes a first wall connected with the first wall. The end components (fixed and moving components) displace relatively freely and transmit electric signals at the same time.

Various embodiments of the present disclosure are directed towards an integrated chip including a microelectromechanical systems (MEMS) structure overlying a substrate. A capping structure overlies the MEMS structure. The capping structure at least partially defines a cavity. The MEMS structure is disposed in the cavity. An outgas structure adjacent to the cavity. The outgas structure comprises an amorphous material.

A method including fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a hardmask on a second side of the device wafer, wherein the second side is planar. An etch stop layer is deposited over the hardmask and an exposed portion of the second side of the device wafer. A dielectric layer is formed over the etch stop layer. A via is formed within the dielectric layer. The via is filled with conductive material. A eutectic bond layer is formed over the conductive material. Portions of the dielectric layer uncovered by the eutectic bond layer is etched to expose the etch stop layer. The exposed portions of the etch stop layer is etched. A micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.

A semiconductor device, which comprises: a silicon substrate having a front surface and a back surface; a metal layer located on said front surface; a through silicon via (TSV) extending through said silicon substrate from said back surface to said front surface, wherein said TSV is connected at one end to said metal layer; and a redistribution layer (RDL), wherein said RDL is embedded in said silicon substrate.

Various embodiments of the present disclosure are directed towards a method for forming a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The method includes bonding a MEMS substrate to a carrier substrate. The epitaxial layer is formed over the MEMS substrate, where the epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts is formed over the epitaxial layer.

Examples include a fluidic die. The fluidic die comprises an array of field effect transistors including field effect transistors of a first size and field effect transistors of a second size. At least one connecting member interconnects at least some of the field effect transistors of the array of field effect transistors. The fluidic die further comprises a first fluid actuator connected to a first set of field effect transistors having at least one field effect transistor of the first size. The die includes a second fluid actuator connected to a second respective set of field effect transistors having a first respective field effect transistor of the second size interconnected to at least one other field effect transistor of the array.

A microstructure may be provided by forming a metal layer such as a molybdenum layer over a substrate. An aluminum nitride layer is formed on a top surface of the metal layer. A surface portion of the aluminum nitride layer is converted into a continuous aluminum oxide-containing layer by oxidation. A dielectric spacer layer may be formed over the continuous aluminum oxide-containing layer. Contact via cavities extending through the dielectric spacer layer, the continuous aluminum oxide containing layer, and the aluminum nitride layer and down to a respective portion of the at least one metal layer may be formed using etch processes that contain a wet etch step while suppressing formation of an undercut in the aluminum nitride layer. Contact via structures may be formed in the contact via cavities. The microstructure may include a micro-electromechanical system (MEMS) device containing a piezoelectric transducer.

Representative implementations of techniques, methods, and formulary provide repairs to processed semiconductor substrates, and associated devices, due to erosion or “dishing” of a surface of the substrates. The substrate surface is etched until a preselected portion of one or more embedded interconnect devices protrudes above the surface of the substrate. The interconnect devices are wet etched with a selective etchant, according to a formulary, for a preselected period of time or until the interconnect devices have a preselected height relative to the surface of the substrate. The formulary includes one or more oxidizing agents, one or more organic acids, and glycerol, where the one or more oxidizing agents and the one or more organic acids are each less than 2% of formulary and the glycerol is less than 10% of the formulary.

A method of manufacturing a panel transducer scale package includes securing acoustic components at predetermined locations on a first carrier substrate with a first surface of the acoustic components positioned adjacent to the first carrier substrate. ASIC components are also secured at predetermined locations on the first carrier substrate with a first surface of the ASIC components positioned adjacent to the first carrier substrate. Photoresist resin is applied over the acoustic components and the ASIC components such that a second surface of the acoustic components is left exposed from the photoresist resin. The first carrier substrate is removed to expose the first surface of the acoustic components and the first surface of the ASIC components. A buildup layer is formed including electrical pathways between each of the acoustic components and the ASIC components, and the photoresist resin is removed.

A semiconductor device includes a first substrate; a dielectric layer disposed over the first substrate and a conductive layer disposed in the dielectric layer; a second substrate bonded to the dielectric layer, wherein the second substrate has a first surface facing the first substrate and a second surface opposite to the first substrate; a connecting structure penetrating the second substrate and a portion of the dielectric layer and electrically coupled to the conductive layer; a vent hole penetrating the second substrate from the second surface to the first surface; a first buffer layer between the connecting structure and the dielectric layer and between the connecting structure and the second substrate; and a second buffer layer covering sidewalls of the vent hole and exposed through the first surface of the second substrate. The first buffer layer and the second buffer layer include a same material and a same thickness.