A MEMS microphone includes a first dummy pad elevating a circumferential portion of an intermediate insulation layer adjacent to a second pad electrode, a second dummy pad elevating a first circumferential portion of an upper insulation layer adjacent to the second pad electrode, and a third dummy pad elevating a second circumferential portion of the upper insulation layer adjacent to the first pad electrode. Thus the first circumferential portion of the upper insulation layer is elevated relative to an upper surface of the second pad electrode, and the second circumferential portion of the upper insulation layer is elevated relative to an upper surface of the first pad electrode.

The invention includes a method of promoting interfacial mechanical bonding of two or more components through the use of suspended and/or freestanding structures fabricated using an atom-scale assembly process on at least a portion of the surfaces of such components.

A method for producing an electromigration-resistant crystalline transition-metal silicide layer of a layer sequence, for example, to provide a micro heater includes, supplying a semiconductor substrate including an electrically insulating layer; physically depositing a transition metal on the electrically insulating layer; carrying out a plasma-enhanced chemical vapor deposition while forming an inert gas plasma; conveying monosilane to the inert gas plasma, with the monosilane decomposing into silicon and hydrogen and the silicon in the gaseous phase entering into a chemical reaction with the transition metal in order to form the electromigration-resistant crystalline transition-metal silicide layer.

Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.

A semiconductor device includes first and second exposed electrical contacts and a cavity having a microelectromechanical system (MEMS) structure therein. A conductive path extends from the first exposed electrical contact to the cavity and an over-voltage protection element electrically is coupled between the first and second exposed electrical contacts.

Representative implementations of techniques, methods, and formulary provide repairs to processed semiconductor substrates, and associated devices, due to erosion or dishing of a surface of the substrates. The substrate surface is etched until a preselected portion of one or more embedded interconnect devices protrudes above the surface of the substrate. The interconnect devices are wet etched with a selective etchant, according to a formulary, for a preselected period of time or until the interconnect devices have a preselected height relative to the surface of the substrate. The formulary includes one or more oxidizing agents, one or more organic acids, and glycerol, where the one or more oxidizing agents and the one or more organic acids are each less than 2% of formulary and the glycerol is less than 10% of the formulary.

A MEMS device includes, in part, first and second conductive semiconductor substrates, an insulating material disposed between the semiconductor substrates, a cavity formed in the second semiconductor substrate, and at least first and second drive masses each of which includes a multitude of beams etched from the first semiconductor substrate and is adapted to move in the cavity in response to an applied force. At least a first portion of the first substrate is adapted to move in response to the applied force and causes the at least first and second drive mass to be in electrical communication with the first substrate. The device may further include, in part, a coupling spring disposed between and in electrical communication with the first and second drive masses. The coupling spring is adapted to provide electrical communication between a second portion of the first substrate and the first and second drive masses.

Representative implementations of techniques, methods, and formulary provide repairs to processed semiconductor substrates, and associated devices, due to erosion or dishing of a surface of the substrates. The substrate surface is etched until a preselected portion of one or more embedded interconnect devices protrudes above the surface of the substrate. The interconnect devices are wet etched with a selective etchant, according to a formulary, for a preselected period of time or until the interconnect devices have a preselected height relative to the surface of the substrate. The formulary includes one or more oxidizing agents, one or more organic acids, and glycerol, where the one or more oxidizing agents and the one or more organic acids are each less than 2% of formulary and the glycerol is less than 10% of the formulary.

A bonding pad layer system is deposited on a semiconductor chip as a base, for example, a micromechanical semiconductor chip, in which at least one self-supporting dielectric membrane made up of dielectric layers, a platinum conductor track and a heater made of platinum is integrated. In the process, the deposition of a tantalum layer takes place first, upon that the deposition of a first platinum layer, upon that the deposition of a tantalum nitride layer, upon that the deposition of a second platinum layer and upon that the deposition of a gold layer, at least one bonding pad for connecting with a bonding wire being formed in the gold layer. The bonding pad is situated in the area of the contact hole on the semiconductor chip, in which a platinum conductor track leading to the heater is connected using a ring contact and/or is connected outside this area.

A method includes fusion bonding a first side of a MEMS wafer to a second side of a first handle wafer. A TSV is formed from a first side of the first handle wafer to the second side of the first handle wafer and into the first MEMS wafer. A dielectric layer is formed on the first side of the first handle wafer. A tungsten via is formed in the dielectric layer. Electrodes are formed on the dielectric layer. A second MEMS wafer is eutecticly bonded with a first eutectic bond to the electrodes, wherein the TSV electrically connects the first MEMS wafer to the second MEMS wafer. Standoffs are formed on a second side of the first MEMS wafer. A CMOS wafer is eutecticly bonded with a second eutectic bond to the standoffs, wherein the second eutectic bond includes different materials than the first eutectic bond.