Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. An electrical potential is applied across the interface of the semiconductor and the solution with a specified temporal profile relative to the temporal profile of the spatial pattern of illumination. Such methods are applied to the fabrication of a photodetector integral with a parabolic reflector, cell size sorting chips, a three-dimensional photonic bandgap chip, a photonic integrated circuit, and an integrated photonic microfluidic circuit.

Provided are monolithic structures comprising one or more suspended, nanoporous membranes that are in contact with one or more fluidic cavities, methods of making same, and exemplary uses of same. The monolithic structures can be formed using a transmembrane etch. The monolithic structures can be used, as examples, as filters and filtration modules in microfluidic devices, dialysis devices, and concentration devices in laboratory, industrial, and medical processes.

A microfluidic apparatus and methods for fabrication with a fluidic layer and a pattern layer of spots of concentrated reagents that are disposed in wells of a fluidic layer when the two layers are bonded together. Reagents are stored on the chip prior to use. Because reagents are confined to specific wells, contamination of the channels and other microfluidic structures of the fluidic layer are avoided. The fluidic layer also has a system of vacuum channels and at least one vacuum void to store vacuum potential for controlled micro-fluidic pumping. The top and bottom surfaces of the bonded layers are sealed. The chip can be used for point of care diagnostic assays such as quantitative testing, digital nucleic acid amplification, and biochemical testing such as immunoassays and chemistry testing.

Methods and apparatus for subtractively fabricating three-dimensional structures relative to a surface of a substrate and for additively depositing metal and dopant atoms onto the surface and for diffusing them into the bulk. A chemical solution is applied to the surface of the semiconductor substrate, and a spatial pattern of electron-hole pairs is generated by projecting a spatial pattern of illumination characterized by a specified intensity, wavelength and duration at each pixel of a plurality of pixels on the surface. Charge carriers are driven away from the surface of the semiconductor on a timescale short compared to the carrier recombination lifetime. Such methods are applied to creating a spatially varying doping profile in the semiconductor substrate, a photonic integrated circuit and an integrated photonic microfluidic circuit.

A microfluidic device includes a semiconductor chip having a main chip surface. The microfluidic device further includes an encapsulation body embedding the semiconductor chip, the encapsulation body having a main body surface. A microfluidic component extends over the main chip surface and over the main encapsulation body surface and traverses an outline of the main chip surface.

A method comprises forming etching islands on a substrate and exposing the substrate with etching islands to a solution that reacts with the etching islands to form a filter passage of interconnected pores in the substrate. The filter passage has an inlet into the substrate and an outlet from the substrate.

Various three-dimensional devices that can be formed within the bulk of a semiconductor by photo-controlled selective etching are described herein. With more particularity, semiconductor devices that incorporate three-dimensional electrical vias, waveguides, or fluidic channels that are disposed within a semiconductor are described herein. In an exemplary embodiment, a three-dimensional interposer chip includes an electrical via, a waveguide, and a fluidic channel, wherein the via, the waveguide, and the fluidic channel are disposed within the body of a semiconductor element rather than being deposited on a surface. The three-dimensional interposer is usable to make electrical, optical, or fluidic connections between two or more devices.

A method of creating a polymer surface with surface structures is disclosed. The method includes creating a mold, forming a metal sheet into the molds, creating a surface structure on a surface of the metal sheet by exposing the surface to laser pulses, and bringing a curable polymer to be in contact with the surface of the metal sheet containing the surface structure, curing the curable polymer, and separating the cured polymer from the metal sheet, resulting in a polymer surface containing the surface structure. The polymer surfaces with the surface structures can be hydrophobic or superhydrophobic depending on the micro and nano features contained by the surface structures.

A microfluidic circuit element comprising a microfluidic main channel and nano interstices is disclosed. The nano interstices are formed at both sides of the main channel and are in fluid communication with the main channel. The nano interstices have a height less than that of the main channel, gives more driving force of the microfluidic channel and provides stable flow of a fluid. The microfluidic circuit element may be made from a plastic material having a contact angle of 90 degrees or less. The microfluidic circuit element is particularly useful when filling a liquid sample to the channel which is empty or filled with air and shows greatly improved a storage stability.

An optical electronics device includes first, second and third wafers. The first wafer has a semiconductor substrate with a dielectric layer on a side of the semiconductor substrate. The second wafer has a transparent substrate with an anti-reflective coating on a side of the transparent substrate. The first wafer is bonded to the second wafer at a silicon dioxide layer between the semiconductor substrate and the anti-reflective coating. The first and second wafers include a cavity extending from the dielectric layer through the semiconductor substrate and through the silicon dioxide layer to the anti-reflective coating. The third wafer includes micromechanical elements. The third wafer is bonded to the dielectric layer, and the micromechanical elements are contained within the cavity.