A method of manufacturing a semiconductor device includes: forming a first substrate includes a membrane stack over a first dielectric layer, the membrane stack having a first electrode, a second electrode over the first electrode and a piezoelectric layer between the first electrode and the second electrode, a third electrode over the first dielectric layer, and a second dielectric layer over the membrane stack and the third electrode; forming a second substrate, including: a redistribution layer (RDL) over a third substrate, the RDL having a fourth electrode; and a first cavity on a surface of the RDL adjacent to the fourth electrode; forming a second cavity in one of the first substrate and the second substrate; and bonding the first substrate to the second substrate.

A stacked semiconductor structure includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.

A method includes fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a first mask on a second side of the device wafer, wherein the second side is planar. A plurality of dimple features is formed on an exposed portion on the second side of the device wafer. The first mask is removed from the second side of the device wafer. A second mask is deposited on the second side of the device wafer that corresponds to a standoff. An exposed portion on the second side of the device wafer is etched to form the standoff. The second mask is removed. A rough polysilicon layer is deposited on the second side of the device wafer. A eutectic bond layer is deposited on the standoff. In some embodiments, a micro-electromechanical system (MEMS) device pattern is etched into the device wafer.

The disclosure relates generally to microphone and vibration sensor assemblies (100) having a transducer (102), like a microelectromechanical systems (MEMS) device, and an electrical circuit (103) disposed in a housing (110) configured for integration with a host device. The electrical circuit includes an output driver circuit, a low drop out (LDO) regulator circuit, and an over-voltage protection circuit with improved capacity and response time.

The present disclosure relates to a micro-electromechanical system (MEMS) structure including one or more semiconductor devices arranged on or within a first substrate and a MEMS substrate having an ambulatory element. The MEMS substrate is connected to the first substrate by a conductive bonding structure. A capping substrate is arranged on the MEMs substrate. The capping substrate includes a semiconductor material that is separated from the first substrate by the MEMS substrate. One or more conductive polysilicon vias include a polysilicon material that continuously extends from the conductive bonding structure, completely through the MEMS substrate, and to within the capping substrate. The semiconductor material of the capping substrate covers opposing sidewalls of the polysilicon material and an upper surface of the polysilicon material that is between the opposing sidewalls.

An electronic device and associated methods are disclosed. In one example, the electronic device includes a MEMS die located within a substrate, and below a processor die. In selected examples, the MEMS die includes a resonator. Example methods of forming MEMS resonator devices are also shown.

An ultrasound device for use with various types of imaging. In some embodiments, the ultrasound device may comprise a circuitry substrate and a plurality of transducer chips coupled to the circuitry substrate. In some embodiments, each transducer chip may comprise a microelectromechanical systems (MEMS) component that may include a plurality of ultrasound elements closely packed with one another, an Application-Specific Integrated Circuit (ASIC) that may be operatively coupled to the plurality of ultrasound elements of said MEMS component, and a control unit that may be electrically coupled to each ASIC of the plurality of transducer chips for control thereof. In some embodiments, at least two transducer chips of the plurality of transducer chips may be placed on the circuitry substrate with a separation distance that may be less than an operational wavelength of the ultrasound elements of the MEMS components of said at least two transducer chips.

The present disclosure is drawn to microfluidic devices. The microfluidic device includes a microfluidic well, a layered composite stack, and an optical sensor. The layered composite stack includes an optical filter composited with an etch-stopping layer. The optical filter defines the microfluidic well. The optical sensor is associated with the microfluidic well and has the optical filter positioned therebetween.

An ultrasound transducer device includes: a first insulating layer formed on a first integrated circuit substrate; a second insulating layer formed on the first insulating layer; a third insulating layer formed on the second insulating layer, and a second substrate bonded to the first integrated circuit. A first cavity is formed in the third insulating layer. The second substrate is bonded to the first integrated circuit such that the first cavity is sealed.

The present disclosure relates to a semiconductor structure for a MEMS device. In some embodiments, the structure includes an interlayer dielectric (ILD) region positioned over a substrate. Further the structure includes an inter-metal dielectric region. The IMD region includes a passivation layer overlying a stacked structure. The stacked structure includes dielectric layers and etch stop layers that are stacked in an alternating fashion. Metal wire layers are disposed within the stacked structure of the IMD region. The structure also includes a sensing electrode electrically connected to the IMD region with an electrode extension via. The structure includes a MEMS substrate comprising a MEMS device having a soft mechanical structure positioned adjacent to the sensing electrode.