Patent classifications
B81C1/00246
CMOS CAP FOR MEMS DEVICES
A complementary metal oxide semiconductor (CMOS) device embedded with micro-electro-mechanical system (MEMS) components in a MEMS region. The MEMS components, for example, are infrared (IR) thermosensors. The device is encapsulated with a CMOS compatible IR transparent cap to hermetically seal the MEMS sensors in the MEMS region. The CMOS cap includes a base cap with release openings and a seal cap which seals the release openings.
Method and structure for CMOS-MEMS thin film encapsulation
Representative methods for sealing MEMS devices include depositing insulating material over a substrate, forming conductive vias in a first set of layers of the insulating material, and forming metal structures in a second set of layers of the insulating material. The first and second sets of layers are interleaved in alternation. A dummy insulating layer is provided as an upper-most layer of the first set of layers. Portions of the first and second set of layers are etched to form void regions in the insulating material. A conductive pad is formed on and in a top surface of the insulating material. The void regions are sealed with an encapsulating structure. At least a portion of the encapsulating structure is laterally adjacent the dummy insulating layer, and above a top surface of the conductive pad. An etch is performed to remove at least a portion of the dummy insulating layer.
ULTRASONIC SENSING DEVICE
An electronic device comprises a CMOS substrate having a first surface and a second surface opposite the first surface. A plurality of ultrasonic transducers is provided having a transmit/receive surface. A contact surface is piezoelectrically associated with the plurality of ultrasonic transducers and is formed on the first surface of the CMOS substrate. The plurality of ultrasonic transducers is disposed on the second surface of the CMOS substrate, with the transmit/receive side attached to the second surface thereof such that the CMOS substrate is between the plurality of ultrasonic transducers and the platen. An image sensing system is also provided, together with a method for ultrasonic sensing in the electronic device.
Release chemical protection for integrated complementary metal-oxide-semiconductor (CMOS) and micro-electro-mechanical (MEMS) devices
Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally, or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.
Microelectromechanical device, method for manufacturing a microelectromechanical device, and method for manufacturing a system on chip using a CMOS process
A microelectromechanical systems (MEMS) device is provided and includes a bulk semiconductor substrate, a cavity formed in the bulk semiconductor substrate, a movably suspended mass, a cap structure and a capacitive structure is shown. The movably suspended mass is defined in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity. The cap is structure arranged on the main surface area of the bulk semiconductor substrate. The capacitive structure comprises a first electrode structure arranged on the movably suspended mass and a second electrode structure arranged at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a direction perpendicular to the main surface area of the bulk semiconductor substrate.
CAPACITIVE MICRO STRUCTURE
A micro structure with a substrate having a top surface; a first electrode with a horizontal orientation parallel to the top surface of the substrate, wherein the first electrode is embedded within the substrate so that a top surface of the first electrode coincides with the top surface of the substrate; a dielectric layer arranged on the top surface of the first electrode; and a second electrode arranged above the dielectric layer.
Nano-electromechanical system (NEMS) device structure and method for forming the same
A NEMS device structure and a method for forming the same are provided. The NEMS device structure includes a substrate and an interconnect structure formed over the substrate. The NEMS device structure includes a dielectric layer formed over the interconnect structure and a beam structure formed in and over the dielectric layer, wherein the beam structure includes a plurality of strip structures. The NEMS device structure includes a cap structure formed over the dielectric layer and the beam structure and a cavity formed between the beam structure and the cap structure.
Micro-electro-mechanical device having two buried cavities and manufacturing process thereof
A micro-electro-mechanical device, comprising a monolithic body of semiconductor material accommodating a first buried cavity; a sensitive region facing the first buried cavity; a second cavity facing the first buried cavity; a decoupling trench extending from the monolithic body and separating the sensitive region from a peripheral portion of the monolithic body; a cap die, forming an ASIC, bonded to and facing the first face of the monolithic body; and a first gap between the cap die and the monolithic body. The device also comprises at least one spacer element between the monolithic body and the cap die; at least one stopper element between the monolithic body and the cap die; and a second gap between the stopper element and one between the monolithic body and the cap die. The second gap is smaller than the first gap.
Device arrangement
Various embodiments may provide a device arrangement. The device arrangement may include a substrate including a conductive layer. The device arrangement may further include a microelectromechanical systems (MEMS) device monolithically integrated with the substrate, wherein the MEMS device may be electrically coupled to the conductive layer. A cavity may be defined through the conductive layer for acoustically isolating the MEMS device MEMS device from the substrate. At least one anchor structure may be defined by the conductive layer to support the MEMS device.
MICROFLUIDIC DEVICE, METHOD OF USING MICROFLUIDIC DEVICE AND MICRO TOTAL ANALYSIS SYSTEM
A microfluidic device, a method of using a microfluidic device and a micro total analysis system are provided. The microfluidic device includes a first substrate, and the first substrate includes a base substrate and a pixel array. The pixel array includes a plurality of pixels and is on the base substrate, and each of the plurality of pixels includes a driving electrode. Driving electrodes of two adjacent pixels are in different layers.