Patent classifications
B81C1/00277
Semiconductor device and method for fabricating the same
The present disclosure provides a semiconductor structure and a method for fabricating semiconductor structure. The semiconductor structure includes a first device, configured to be a complementary metal oxide semiconductor device, wherein the first device includes a substrate, a multi-layer structure disposed on the substrate, a first hole, defined between a first end with a first circumference and a second end with a second circumference, a second hole, aligned to the first hole and defined between the second end and a third end with a third circumference, wherein the third circumference is larger than the first circumference and the second circumference, and a second device, configured to be a micro-electro mechanical system device and bonded to the first device, wherein a first chamber is between the first device and the second device, and the first end links with the first chamber, and a sealing object configured to seal the second hole.
BARRIER STRUCTURE WITHIN A MICROELECTRONIC ENCLOSURE
An example method includes applying a dielectric material on at least a first portion of a first substrate; depositing a seed metal on the dielectric material and on at least a second portion of the first substrate; depositing a plating photoresist on at least a portion of the seed metal; electroplating a metal line on the seed metal within boundaries formed by the plating photoresist; stripping at least a portion of the plating photoresist, and etching at least a portion of the seed metal; and positioning a second substrate relative to a barrier structure formed in part by the metal line to form a cavity.
Method for manufacturing semiconductor structure
A method for manufacturing a semiconductor structure is provided. The method includes the operations as follows. A first substrate having a top surface is received. A semiconductor layer is formed over the first substrate. A cavity is formed at the top surface of the semiconductor layer. A second substrate is bonded over the first substrate to cover the semiconductor layer. The second substrate has a through hole connected to the cavity of the semiconductor layer. A eutectic sealing structure is formed on the second substrate to cover the through hole. The eutectic sealing structure includes a first metal layer and a second metal layer eutectically bonded on the first metal layer.