MEMS based sensors, particularly capacitive sensors, potentially can address critical considerations for users including accuracy, repeatability, long-term stability, ease of calibration, resistance to chemical and physical contaminants, size, packaging, and cost effectiveness. Accordingly, it would be beneficial to exploit MEMS processes that allow for manufacturability and integration of resonator elements into cavities within the MEMS sensor that are at low pressure allowing high quality factor resonators and absolute pressure sensors to be implemented. Embodiments of the invention provide capacitive sensors and MEMS elements that can be implemented directly above silicon CMOS electronics.

A method of manufacturing an ultrasound imaging device involves forming an interposer structure, including forming a first metal material within openings through a substate and on top and bottom surfaces of the substrate, patterning the first metal material, forming a dielectric layer over the patterned first metal material, forming openings within the dielectric layer to expose portions of the patterned first metal material, filling the openings with a second metal material, forming a third metal material on the top and bottom surfaces of the substrate, and patterning the third metal material. The method further involves forming a packaging structure for an ultrasound-on-chip device, including attaching a multi-layer flex substrate to a carrier wafer, bonding a first side of an ultrasound-on-chip device to the multi-layer flex substrate, bonding a second side of the ultrasound-on-chip device to a first side of the interposer structure, and removing the carrier wafer.

A glass wafer has an internal surface and an opposing external surface separated by a wafer thickness. A hermetic, electrically conductive feedthrough extends through the wafer from the internal surface to the opposing external surface. The feedthrough includes a feedthrough member having an inner face exposed along the internal surface for electrically coupling to an electrical circuit. The feedthrough member extends from the inner face partially through the wafer thickness to an exteriorly-facing outer face hermetically embedded within the wafer.

In an embodiment an electronic device includes a carrier board having an upper surface, an electronic chip mounted on the upper surface of the carrier board, the electronic chip having a mounting side facing the upper surface of the carrier board, a flexible mounting layer arranged between the upper surface of the carrier board and the mounting side of the electronic chip, the flexible mounting layer mounting the electronic chip to the carrier board, wherein the mounting side has at least one first region and a second region, and wherein the electronic chip has at least one chip contact element in the first region and at least one connection element arranged on the at least one first region and connecting the at least one chip contact element to the upper surface of the carrier board, wherein the flexible mounting layer separates the second region from the connection element.

The present disclosure relates to a micro-electromechanical system (MEMS) structure including one or more semiconductor devices arranged on or within a first substrate and a MEMS substrate having an ambulatory element. The MEMS substrate is connected to the first substrate by a conductive bonding structure. A capping substrate is arranged on the MEMs substrate. The capping substrate includes a semiconductor material that is separated from the first substrate by the MEMS substrate. One or more conductive polysilicon vias include a polysilicon material that continuously extends from the conductive bonding structure, completely through the MEMS substrate, and to within the capping substrate. The semiconductor material of the capping substrate covers opposing sidewalls of the polysilicon material and an upper surface of the polysilicon material that is between the opposing sidewalls.

MEMS based sensors, particularly capacitive sensors, potentially can address critical considerations for users including accuracy, repeatability, long-term stability, ease of calibration, resistance to chemical and physical contaminants, size, packaging, and cost effectiveness. Accordingly, it would be beneficial to exploit MEMS processes that allow for manufacturability and integration of resonator elements into cavities within the MEMS sensor that are at low pressure allowing high quality factor resonators and absolute pressure sensors to be implemented. Embodiments of the invention provide capacitive sensors and MEMS elements that can be implemented directly above silicon CMOS electronics.

The present invention relates to the field of medical devices, and specifically to a packaging structure and a packaging method for a retinal prosthesis implanted chip, including a high-density stimulation electrode component processed by a glass substrate, wherein the stimulation electrode component comprises the glass substrate, and a plurality of stimulation electrodes and a pad structure provided on the glass substrate; the stimulation electrodes are formed through cutting out metal pins on the metal and then pouring with glass; the stimulation electrode component is connected to an ASIC chip; a glass packaging cover is covered on the ASIC chip, the glass packaging cover is provided with a metal feedthrough structure for communicating with the stimulation chip; and the packaging cover covers and encapsulates the pad structure. In the packaging structure of the present invention, the substrate and the packaging cover are both made of a glass material, and thereby enable manufacture of a high-density stimulation electrode array, and the metal feedthrough structure is directly used on the glass cover, which facilitates wiring and achieves good sealing performance of the package cover.

The present invention discloses an SOC PMUT suitable for high-density system integration, an array chip and a manufacturing method thereof. With the SOC PMUT suitable for high-density system integration, vertical stacking and monolithic integration of a SOC PMUT array with CMOS auxiliary circuits is realized by means of direct bonding of active wafers and a vertical multi-channel metal wiring structure; in addition, the extension to the package layer is implemented by means of TSVs, without any bonding mini-pad on the periphery of the array for communication with the CMOS. Thus, the bottleneck of metal interconnections in conventional ultrasonic transducers is overcome, the chip area occupied by metal interconnections in ultrasonic transducers is greatly reduced, the metal wiring length is reduced, thus the resulting adverse effects of an electrical parasitic effect on the performance of the ultrasonic transducer array are reduced.

MEMS based sensors, particularly capacitive sensors, potentially can address critical considerations for users including accuracy, repeatability, long-term stability, ease of calibration, resistance to chemical and physical contaminants, size, packaging, and cost effectiveness. Accordingly, it would be beneficial to exploit MEMS processes that allow for manufacturability and integration of resonator elements into cavities within the MEMS sensor that are at low pressure allowing high quality factor resonators and absolute pressure sensors to be implemented. Embodiments of the invention provide capacitive sensors and MEMS elements that can be implemented directly above silicon CMOS electronics.

The present disclosure describes a process for making a three-dimensional (3D) package, which starts with providing a mold precursor module that includes a first device die and a floor connectivity die (FCD) encapsulated by a mold compound. The FCD includes a sacrificial die body and multiple floor interconnections underneath the sacrificial die body. Next, the mold compound is thinned down until the sacrificial die body of the FCD is completely consumed, such that each floor interconnection is exposed through the mold compound. The thinning down step does not affect a device layer in the first device die. A second device die, which includes a die body and multiple electrical die interconnections, is then mounted over the exposed floor interconnections. Herein, each electrical die interconnection is vertically aligned with and electrically connected to a corresponding floor interconnection from the FCD.