Patent classifications
B81C1/00317
Method for manufacturing a thermoelectric-based infrared detector having a MEMS structure above a hybrid component
Device and method of forming a device are disclosed. The device includes a substrate with a transistor component disposed in a transistor region and a micro-electrical mechanical system (MEMS) component disposed on a membrane over a lower sensor cavity in a hybrid region. The MEMS component serves as thermoelectric-based infrared sensor, a thermopile line structure which includes an absorber layer disposed over a portion of oppositely doped first and second line segments. A back-end-of-line (BEOL) dielectric is disposed on the substrate having a plurality of inter layer dielectric (ILD) layers with metal and via levels. The ILD layers include metal lines and via contacts for interconnecting the components of the device. The metal lines in the metal levels are configured to define a BEOL or an upper sensor cavity over the lower sensor cavity, and metal lines of a first metal level of the BEOL dielectric are configured to define a geometry of the MEMS component.
Chip packages and methods for forming the same
A chip package for optical sensing includes a substrate, and a semiconductor device positioned on the substrate and coupled to the substrate through a first conducting element. Two molding processes are applied, to form a first colloid body on the substrate so as to cover the semiconductor device and, on the first colloid body, to form a second colloid body which covers an optical device. The optical device is electrically connected to the substrate through a second conducting element. The light transmittance of the second colloid body exceeds that of the first colloid body.
LOW-HEIGHT OPTOELECTRONIC MODULES AND PACKAGES
An optoelectronic module includes an optical filter and can have a relatively small overall height. The module includes a semiconductor die for the optical filter, where the die has a cavity in its underside. The cavity provides space to accommodate an optoelectronic device such as a light sensor or light emitter. Such an arrangement can reduce the overall height of the module, thereby facilitating its integration into a host device in which space is at a premium.
HERMETICALLY SEALED OPTICALLY TRANSPARENT WAFER-LEVEL PACKAGES AND METHODS FOR MAKING THE SAME
Wafer level encapsulated packages includes a wafer, a glass substrate hermetically sealed to the wafer, and an electronic component. The glass substrate includes a glass cladding layer fused to a glass core layer and a cavity formed in the glass substrate. The electronic component is encapsulated within the cavity. In various embodiments, the floor of the cavity is planar and substantially parallel to a plane defined by a top surface of the glass cladding layer. The glass cladding layer has a higher etch rate in an etchant than the glass core layer. In various embodiments, the wafer level encapsulated package is substantially optically transparent. Methods for forming the wafer level encapsulated package and electronic devices formed from the wafer level encapsulated package are also described.
Optical electronics device
An optical electronics device includes first, second and third wafers. The first wafer has a semiconductor substrate with a dielectric layer on a side of the semiconductor substrate. The second wafer has a transparent substrate with an anti-reflective coating on a side of the transparent substrate. The first wafer is bonded to the second wafer at a silicon dioxide layer between the semiconductor substrate and the anti-reflective coating. The first and second wafers include a cavity extending from the dielectric layer through the semiconductor substrate and through the silicon dioxide layer to the anti-reflective coating. The third wafer includes micromechanical elements. The third wafer is bonded to the dielectric layer, and the micromechanical elements are contained within the cavity.
PACKAGED DEVICE WITH DIE WRAPPED BY A SUBSTRATE
A die-wrapped packaged device includes at least one flexible substrate having a top side and a bottom side that has lead terminals, where the top side has outer positioned die bonding features coupled by traces to through-vias that couple through a thickness of the flexible substrate to the lead terminals. At least one die includes a substrate having a back side and a topside semiconductor surface including circuitry thereon having nodes coupled to bond pads. One of the sides of the die is mounted on the top side of the flexible circuit, and the flexible substrate has a sufficient length relative to the die so that the flexible substrate wraps to extend over at least two sidewalls of the die onto the top side of the flexible substrate so that the die bonding features contact the bond pads.
CAPPING PLATE FOR PANEL SCALE PACKAGING OF MEMS PRODUCTS
A method of manufacturing MEMS housings includes: providing glass spacers; providing a window plate; attaching the window plate to the glass spacers; aligning the glass spacers with a device glass plate having MEMS devices thereon; bonding the glass spacers to the device glass plate; and singulating the glass spacers, window plate, and device glass plate to produce the MEMS housings.
METHOD FOR PRODUCING A MICROMECHANICAL DEVICE HAVING INCLINED OPTICAL WINDOWS, AND CORRESPONDING MICROMECHANICAL DEVICE
A method for producing a micromechanical device having inclined optical windows, and a corresponding micromechanical device are described. The production method includes: providing a first substrate having a front side and a rear side; forming a plurality of spaced-apart through holes in the first substrate which are arranged along a plurality of spaced-apart rows in the first substrate; forming a respective continuous beveled groove along each of the rows, the grooves defining a seat for the inclined optical windows; and inserting the optical windows into the grooves above the through holes.
Chip packages and methods for forming the same
A chip package for optical sensing includes a substrate, and a semiconductor device positioned on the substrate and coupled to the substrate through a first conducting element. Two molding processes are applied, to form a first colloid body on the substrate so as to cover the semiconductor device and, on the first colloid body, to form a second colloid body which covers an optical device. The optical device is electrically connected to the substrate through a second conducting element. The light transmittance of the second colloid body exceeds that of the first colloid body.
CHIP PACKAGES AND METHODS FOR FORMING THE SAME
A chip package for optical sensing includes a substrate, and a semiconductor device positioned on the substrate and coupled to the substrate through a first conducting element. Two molding processes are applied, to form a first colloid body on the substrate so as to cover the semiconductor device and, on the first colloid body, to form a second colloid body which covers an optical device. The optical device is electrically connected to the substrate through a second conducting element. The light transmittance of the second colloid body exceeds that of the first colloid body.