A semiconductor device package includes a carrier; a sensor element disposed on or within the carrier; a cover disposed above the carrier and comprising a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface; and a light transmissive element covering the penetrating hole, wherein the sensor element senses or detects light passing through the light transmissive element.

A microelectromechanical (MEMS) Fabry-Perot interferometer includes a transparent substrate; a first metallic mirror structure on the transparent substrate, including a first metal layer and a first support layer; a second metallic mirror structure above the first metallic mirror structure on an opposite side of the first metallic mirror structure in view of the transparent substrate, the second metallic mirror structure including a second metal layer and a second support layer, wherein the first and the second support layer are parallel and including at least one of aluminum oxide or titanium dioxide; a Fabry-Perot cavity between the first and the second support layer, whereby the Fabry-Perot cavity is formed by providing an insulation layer on the first mirror structure, and at least partially removing the insulation layer after providing the second mirror structure; and electrodes for providing electrical contacts to the first and the second metal layer.

A method includes, before attaching a window assembly to a semiconductor wafer, the semiconductor wafer including a plurality of integrated circuits and each integrated circuit including an electrical connection pad, adhering the window assembly to a carrier fixture. The method further includes, before attaching the window assembly to the semiconductor wafer, removing portions of the window assembly to create removal areas. The method then includes attaching the window assembly to the semiconductor wafer such that the electrical connection pad of each of the plurality of integrated circuits is within a removal area and removing the carrier fixture leaving the window assembly adhered to the semiconductor wafer with the electrical connection pad exposed of each of the plurality of integrated circuits.

In described examples, a cavity is formed between a substrate and a cap. One or more access holes are formed through the cap for removing portions of a sacrificial layer from within the cavity. A cover is supported by the cap, where the cover is for occulting the one or more access holes along a perspective. An encapsulant seals the cavity, where the encapsulant encapsulates the cover and the one or more access holes.

The present disclosure provides a package base core and a sensor package structure. The package base core includes a substrate and at least one stopper, or the package base core includes a substrate, at least one stopper, and a compound. The sensor package structure includes a substrate, a first stopper, a second stopper, a sensing member, a first compound, a second compound, and a translucent member. The stopper (or the first and second stoppers) of the present disclosure is provided to form with a protruding portion on the substrate, so that an overflowing of the compound can be avoided, thereby increasing the reliability of the package base core.

A method for manufacturing a protective wafer including a frame wafer and an optical window, and to a method for manufacturing a micromechanical device including such a protective wafer having an inclined optical window. Also described are a protective wafer including a frame wafer and an optical window, and a micromechanical device including a MEMS wafer and such a protective wafer, which delimit a cavity, the protective wafer including an inclined optical window.

An electrical component package includes a glass substrate, an interposer panel positioned on the glass substrate, the interposer panel comprising a device cavity, a wafer positioned on the interposer panel such that the device cavity is enclosed by the glass substrate, the interposer panel, and the wafer. The electrical component package further includes a metal seed layer disposed between the interposer panel and the wafer, and a dielectric coating. The dielectric coating hermetically seals the interposer panel to the glass substrate, the interposer panel to the metal seed layer and the wafer, and the interposer panel hermetically seals the metal seed layer to the glass substrate such that the device cavity is hermetically sealed from ambient atmosphere.

A method for making a micro-electro mechanical (MEMS) device includes forming a MEMS mirror stack on a handle layer, and applying a first bonding layer to the MEMS mirror stack. The method continues with disposing a substrate on the first bonding layer such that the MEMS mirror stack is mechanically anchored to the substrate and so as to seal against ingress of environmental contaminants, removing the handle layer, and applying a second bonding layer to the MEMS mirror stack. A cap layer is disposed on the second bonding layer such that the cap layer is mechanically anchored to the MEMS mirror stack and so as to seal against ingress of environmental contaminants.

In an electro-optic device, a chip provided with a mirror and a drive element adapted to drive the mirror, a cover having a light-transmitting property and adapted to cover the mirror in a planar view, and a spacer located between the cover and the chip are disposed on an interconnection board. Further, a boundary between the cover and the spacer, a boundary between the chip and the spacer, and a part of the interconnection board are covered with an inorganic film such as an aluminum oxide film. The inorganic film also covers a part of a chip-side terminal and an internal terminal, and a conductive member.

A semiconductor device package includes: (1) a carrier; (2) a sensor element disposed on or within the carrier; and (3) a cover including a top surface, a bottom surface and an inner sidewall, the inner sidewall defining a penetrating hole extending from the top surface to the bottom surface, and the penetrating hole exposing the sensor element. The semiconductor device package is characterized such that (i) the inner sidewall is divided into an upper portion and a lower portion, the upper portion is substantially perpendicular to the top surface, and the lower portion is tilted; or (ii) the entire inner sidewall is tilted. The lower portion of the inner sidewall or the entire inner sidewall is tilted at an angle of between about 10 to less than about 90, relative to the top surface.