The present disclosure relates to a microelectromechanical systems (MEMS) package featuring a flat plate having a raised edge around its perimeter serving as an anti-stiction device, and an associated method of formation. A CMOS IC is provided having a dielectric structure surrounding a plurality of conductive interconnect layers disposed over a CMOS substrate. A MEMS IC is bonded to the dielectric structure such that it forms a cavity with a lowered central portion the dielectric structure, and the MEMS IC includes a movable mass that is arranged within the cavity. The CMOS IC includes an anti-stiction plate disposed under the movable mass. The anti-stiction plate is made of a conductive material and has a raised edge surrounding at least a part of a perimeter of a substantially planar upper surface.

Provided herein is a method including forming a MEMS cap. A cavity is formed in the MEMS cap wafer, and a bond material is deposited on the MEMS cap wafer, wherein the bond material lines the cavity after the depositing. The MEMS cap wafer is bonded to a MEMS device wafer, wherein the bond material forms a bond between the MEMS cap wafer and the MEMS device wafer. A MEMS device is formed in the MEMS device wafer. The bond material is removed from the cavity.

Multilayered stacks having layers of silicon interleaved with layers of a dielectric, such as silicon dioxide, are plasma etched with non-corrosive process gas chemistries. Etching plasmas of fluorine source gases, such as SF.sub.6 and/or NF.sub.3 typically only suitable for dielectric layers, are energized by pulsed RF to achieve high aspect ratio etching of silicon/silicon dioxide bi-layers stacks without the addition of corrosive gases, such as HBr or Cl.sub.2. In embodiments, a mask open etch and the multi-layered stack etch are performed in a same plasma processing chamber enabling a single chamber, single recipe solution for patterning such multi-layered stacks. In embodiments, 3D NAND memory cells are fabricated with memory plug and/or word line separation etches employing a fluorine-based, pulsed-RF plasma etch.

A method includes a step of forming a sacrificial layer on a first film, a step of forming a second film on the sacrificial layer, a step of forming an etching opening that extends through at least one of the first film and the second film so as to communicate with the sacrificial layer, and a step of forming a hollow portion by etching the sacrificial layer using a gas containing a fluorine-containing gas and hydrogen via the etching opening, wherein a composition ratio of silicon to nitrogen in a first region having a face in contact with the sacrificial layer is larger than a composition ratio of silicon to nitrogen in a second region not including the first region.

Described herein is a technique capable of forming a sacrificial film with a high wet etching rate to obtain a wet etching selectivity with respect to a movable electrode when manufacturing a cantilever structure sensor using MEMS (Micro-Electro-Mechanical Systems) technology. According to one aspect of the technique of the present disclosure, there is provided a method of manufacturing a semiconductor device including: (a) loading a substrate including a control electrode, a pedestal and a counter electrode formed thereon into a process chamber; and (b) forming a sacrificial film containing impurities on the control electrode, the pedestal and the counter electrode by supplying a first process gas in a non-plasma state containing the impurities and silicon to the process chamber through a first gas supply pipe together with supplying a second process gas in a plasma state containing oxygen to the process chamber through a second gas supply pipe.

A MEMS anti-phase vibratory gyroscope includes two measurement masses with a top cap and a bottom cap each coupled with a respective measurement mass. The measurement masses are oppositely coupled with each other in the vertical direction. Each measurement mass includes an outer frame, an inner frame located within the outer frame, and a mass located within the inner frame. The two measurement masses are coupled with each other through the outer frame. The inner frame is coupled with the outer frame by a plurality of first elastic beams. The mass is coupled with the inner frame by a plurality of second elastic beams. A comb coupling structure is provided along opposite sides of the outer frame and the inner frame. The two masses vibrate toward the opposite direction, and the comb coupling structure measures the angular velocity of rotation.

The present disclosure relates to a microphone. In some embodiments, the microphone may comprise a substrate, a diaphragm, a backplate, and a sidewall stopper. The substrate has an opening disposed through the substrate. The diaphragm is disposed over the substrate and facing the opening of the substrate. The diaphragm has a venting hole overlying the opening of the substrate. A backplate is disposed over and spaced apart from the diaphragm. A sidewall stopper is disposed along a sidewall of the venting hole of the diaphragm and thus is not limited by a distance between the movable part and the stable part. Also, the sidewall stopper does not alternate the shape of movable part, and thus will less likely introduce crack to the movable part. In some embodiments, the sidewall stopper may be formed like a sidewall stopper by a self-alignment process, such that no extra mask is needed.

A robust and general fabrication/manufacturing method is described herein for the fabrication of periodic three-dimensional (3D) hierarchical nanostructures in a highly scalable and tunable manner. This nanofabrication technique exploits the selected and repeated etching of spherical particles that serve as resist material and that can be shaped in parallel for each processing step. The method enables the fabrication of periodic, vertically aligned nanotubes at the wafer scale with nanometer-scale control in three dimensions including outer/inner diameters, heights/hole-depths, and pitches. The method was utilized to construct 3D periodic hierarchical hybrid silicon and hybrid nanostructures such as multi-level solid/hollow nanotowers where the height and diameter of each level of each structure can be configured precisely as well as 3D concentric plasmonic supported metal nanodisk/nanorings with tunable optical properties on a variety of substrates.

A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.

Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.