The present application provides the block copolymers and their application. The block copolymer has an excellent self assembling property and phase separation and various required functions can be freely applied thereto as necessary.

The present disclosure relates to a microelectromechanical systems (MEMS) package featuring a flat plate having a raised edge around its perimeter serving as an anti-stiction device, and an associated method of formation. A CMOS IC is provided having a dielectric structure surrounding a plurality of conductive interconnect layers disposed over a CMOS substrate. A MEMS IC is bonded to the dielectric structure such that it forms a cavity with a lowered central portion the dielectric structure, and the MEMS IC includes a movable mass that is arranged within the cavity. The CMOS IC includes an anti-stiction plate disposed under the movable mass. The anti-stiction plate is made of a conductive material and has a raised edge surrounding at least a part of a perimeter of a substantially planar upper surface.

Methods for forming an electrode structure, which can be used as a biosensor, are provided in which the electrode structure has non-random topography located on one surface of an electrode base. In some embodiments, an electrode structure is obtained that contains no interface between the non-random topography of the electrode structure and the electrode base of the electrode structure. In other embodiments, electrode structures are obtained that have an interface between the non-random topography of the electrode structure and the electrode base of the electrode structure.

Methods for forming an electrode structure, which can be used as a biosensor, are provided in which the electrode structure has non-random topography located on one surface of an electrode base. In some embodiments, an electrode structure is obtained that contains no interface between the non-random topography of the electrode structure and the electrode base of the electrode structure. In other embodiments, electrode structures are obtained that have an interface between the non-random topography of the electrode structure and the electrode base of the electrode structure.

A sensor device and a method for manufacturing the sensor device. The sensor device is equipped with an impact element that includes an inner part of dielectric bulk material and an outer part of diamond-like coating material. The inner part is made to be lower at the edges than in the middle, and the outer part is formed of a diamond-like coating layer that covers the inner part. The DLC coated impact element is mechanically more robust than the rectangular prior art structures. Furthermore, the tapered form of the impact element improves conductivity of the DLC coating such that discharge of static buildup in the impact element is effectively enabled.

The present application relates to monomers, methods for preparing block copolymers, block copolymers and their applications. The monomers may form a block copolymer which has an excellent self assembling property and phase separation and to which various required functions can be freely applied as necessary.

Methods for forming an electrode structure, which can be used as a biosensor, are provided in which the electrode structure has non-random topography located on one surface of an electrode base. In some embodiments, an electrode structure is obtained that contains no interface between the non-random topography of the electrode structure and the electrode base of the electrode structure. In other embodiments, electrode structures are obtained that have an interface between the non-random topography of the electrode structure and the electrode base of the electrode structure.

A method is for manufacturing a plurality of silicon microneedles which have a bevelled tip. The method includes providing a silicon substrate having a front face and a rear face, forming a first mask arrangement on the front face of the substrate, the first mask arrangement defining one or more gaps, and performing a SF.sub.6 based plasma etch of the front face through the gaps in the first mask arrangement to provide one or more etch features having a sloping face. The SF.sub.6 based plasma etch undercuts the first mask arrangement with an undercut that is at least 10% of the depth of a corresponding etch feature. The method further includes forming a second mask arrangement on the etch features to define locations of the microneedles, in which the second mask arrangement is located entirely on sloping faces of the etch features, and performing a DRIE (deep reactive ion etch) anisotropic plasma etch of the etched front face of the substrate to form a plurality of microneedles which have a bevelled tip, where the sloping faces of the etch features at least in part give rise to the bevelled tips of the microneedles.

A MEMS device and a method of forming the same. A disclosed method includes: providing a silicon substrate layer, a buried oxide layer and a device silicon layer; using a microfabrication process to pattern a set of device features on the device silicon layer including a shuttle mass and an anchor frame; removing the silicon substrate layer and buried oxide below the shuttle mass; placing a shadow mask on a surface of the device silicon layer, wherein the shadow mask has an microscale opening to expose at least one device feature; and forming a nanoscale stopper on a sidewall of the at least one device feature by depositing a deposition material through the opening in a controlled manner.

Systems and methods that protect CMOS layers from exposure to a release chemical are provided. The release chemical is utilized to release a micro-electro-mechanical (MEMS) device integrated with the CMOS wafer. Sidewalls of passivation openings created in a complementary metal-oxide-semiconductor (CMOS) wafer expose a dielectric layer of the CMOS wafer that can be damaged on contact with the release chemical. In one aspect, to protect the CMOS wafer and prevent exposure of the dielectric layer, the sidewalls of the passivation openings can be covered with a metal barrier layer that is resistant to the release chemical. Additionally, or optionally, an insulating barrier layer can be deposited on the surface of the CMOS wafer to protect a passivation layer from exposure to the release chemical.