B81C1/00539

METHOD FOR PROCESSING GLASS BY ALKALINE ETCHING

A method for processing glass is provided. The method includes the steps of providing a glass element and removing glass material from the glass element by etching with an alkaline etching medium in an organic solvent.

METHOD FOR PRODUCING A MICROSTRUCTURE COMPONENT, MICROSTRUCTURE COMPONENT AND X-RAY DEVICE
20190267149 · 2019-08-29 · ·

A method for producing a microstructure component, a microstructure component and an x-ray device are disclosed. In the method, a plurality of punctiform injection structures are inserted in a grid in a first substrate direction and a second substrate direction, standing at right angles thereto, into a first surface of a wafer-like silicon substrate. The injection structures are lengthened into drilled holes in the depth direction of the silicon substrate in a first etching step. A second surface of the silicon substrate is then at least partly removed for rear-side opening of the drilled holes in a second etching step and in a third etching step, an etching medium acting anisotropically is poured alternately through the drilled holes from both surfaces of the silicon substrate, so that drilled holes arranged next to one another in the first substrate direction connect to form a column running in the first substrate direction.

VERTICALLY STACKED NANOFLUIDIC CHANNEL ARRAY
20190263655 · 2019-08-29 ·

Techniques regarding a vertical nanofluidic channel array are provided. For example, one or more embodiments described herein can regard an apparatus that can comprise a semiconductor substrate and a dielectric layer adjacent to the semiconductor substrate. The dielectric layer can comprise a first nanofluidic channel and a second nanofluidic channel. The second nanofluidic channel can be located between the first nanofluidic channel and the semiconductor substrate.

Fabrication process for a symmetrical MEMS accelerometer

A method for fabricating a symmetrical MEMS accelerometer. For each half, etch multiple holes on the bottom of an SOI wafer; form multiple hollowed parts on the top of a silicon wafer; form silicon dioxide on the top and bottom of the silicon wafer; bond the top of the silicon wafer with the bottom of the SOI wafer; deposit silicon nitride on the bottom of the silicon wafer, remove parts of the silicon nitride and silicon dioxide to expose the bottom of the silicon wafer; etch the exposed bottom of the silicon wafer; reduce the thickness of the SOI wafer; remove the silicon nitride and exposed bottom. Bond the two halves along their bottom surface to form the accelerometer. Form a bottom cap including electrodes. Bond the bottom cap and the accelerometer. Deposit metal on top of the silicon wafer.

ULTRASONIC TRANSDUCER AND METHOD FOR MANUFACTURING THE SAME, DISPLAY SUBSTARTE AND METHOD FOR MANUFACTURING THE SAME
20190210867 · 2019-07-11 ·

The present disclosure provides an ultrasonic transducer and a method for manufacturing an ultrasonic transducer, a display substrate and a method for manufacturing a display substrate. The method for manufacturing the ultrasonic transducer includes: forming a via hole in a substrate; forming a structural layer on a side of the substrate, the structural layer cover the via hole; and etching the structural layer from a side of the substrate away from the structural layer by using the substrate formed with the via hole as a blocking layer, to form a cavity at a position of the structural layer corresponding to that of the via hole.

FABRY-PEROT INTERFERENCE FILTER AND PRODUCTION METHOD FOR FABRY-PEROT INTERFERENCE FILTER

The Fabry-Perot interference filter includes: a substrate having a first surface, a first laminate having a first mirror portion disposed on the first surface, a second laminate having a second mirror portion facing the first mirror portion with an air gap interposed therebetween, and an intermediate layer defining the air gap between the first and second laminate. The substrate has an outer edge portion positioned outside an outer edge of the intermediate layer when viewed from a direction perpendicular to the first surface. The second laminate further includes a covering portion covering the intermediate layer and a peripheral edge portion positioned on the first surface in the outer edge portion. The second mirror portion, the covering portion, and the peripheral edge portion are integrally formed so as to be continuous with each other. The peripheral edge portion is thinned along an outer edge of the outer edge portion.

NANOSTRUCTURES FABRICATED BY METAL ASISTED CHEMICAL ETCHING FOR ANTIBACTERIAL APPLICATIONS

The method comprises contacting a silicon substrate with a silver salt and an acid for a time effective to produce spikes having a first end disposed on the silicon substrate and a second end extending away from the silicon substrate. The spikes have a second end diameter of about 10 nm to about 200 nm, a height of about 100 nm to 10 micrometers, and a density of about 10 to 100 per square microns. The nanostructures provide antimicrobial properties and can be transferred to the surface of various materials such as polymers.

SEMICONDUCTOR CHIP WITH EMBEDDED MICROFLUIDIC CHANNELS AND METHOD OF FABRICATING THE SAME
20240208806 · 2024-06-27 · ·

A semiconductor chip with embedded microfluidic channels includes a semiconductor substrate, a circuit structure layer, a first microfluidic channel and a micro via hole. The circuit structure layer includes a first metal layer, a first insulation layer and a second metal layer sequentially disposed on a substrate surface of the semiconductor substrate along a stacking direction. A plurality of first bridge patterns penetrates the first insulation layer, and are each electrically connected to the first metal layer and/or the second metal layer. The first microfluidic channel and the micro via hole are embedded in the circuit structure layer. In the stacking direction, a first height of the first microfluidic channel is equal to a first thickness of the first metal layer. In any direction parallel to the substrate surface, a hole width of the micro via hole is equal to a pattern width of each of the first bridge patterns.

Device and method for direct printing of microfluidic chip based on large-format array femtosecond laser

A device and a method for direct printing of a microfluidic chip based on a large-format array femtosecond laser. The large-format array femtosecond laser with multi-parameter adjustable laser beam state is used to achieve large-format laser interference. The interference state, interference combination and exposure mode of the large-format array femtosecond laser are regulated, and multiple exposures are superimposed to output the desired pattern for the microfluidic chip, enabling the direct printing processing of the microfluidic chip.

Compositions and methods for selectively etching silicon nitride films

The invention relates to compositions and methods for the selective wet etching of a surface of a microelectronic device that contains both silicon nitride (SiN) and polysilicon. An etching composition as described comprises phosphoric acid, certain polysilicon corrosion inhibitors, along with certain silanes. The combination of the two components was found to greatly improve the selectivity of the silicon nitride etching composition in the presence of polysilicon.