A device includes a substrate and an intermetal dielectric (IMD) layer disposed over the substrate. The device also includes a first plurality of polysilicon layers disposed over the IMD layer and over a bumpstop. The device also includes a second plurality of polysilicon layers disposed within the IMD layer. The device includes a patterned actuator layer with a first side and a second side, wherein the first side of the patterned actuator layer is lined with a polysilicon layer, and wherein the first side of the patterned actuator layer faces the bumpstop. The device further includes a standoff formed over the IMD layer, a via through the standoff making electrical contact with the polysilicon layer of the actuator and a portion of the second plurality of polysilicon layers and a bond material disposed on the second side of the patterned actuator layer.

A semiconductor structure includes a first device and a second device. The first device includes a plate including a plurality of apertures; a membrane disposed opposite to the plate and including a plurality of corrugations, and a conductive plug extending through the plate and the membrane. The second device includes a substrate and a bond pad disposed over the substrate, wherein the conductive plug is bonded with the bond pad to integrate the first device with the second device, and the plate includes a semiconductive member and a tensile member, and the semiconductive member is disposed within the tensile member.

An integrated device package is disclosed. The package can include a carrier, such as first integrated device die, and a second integrated device die stacked on the first integrated device die. The package can include a buffer layer which coats at least a portion of an exterior surface of the first integrated device die and which is disposed between the second integrated device die and the first integrated device die. The buffer layer can comprise a pattern to reduce transmission of stresses between the first integrated device die and the second integrated device die.

A method of forming a membrane of a semiconductor membrane device is provided. The method includes providing a silicon on insulator (SOI) substrate having an active silicon layer, a buried oxide (BOX) layer, and a handle wafer. The method further includes determining a membrane area of said substrate, locally removing said BOX layer in at least a part of said membrane area, providing one or more dielectric layers on said active silicon layer, and etching said substrate to form said membrane that includes said one or more dielectric layers in said membrane area. Said etching includes an anisotropic etch through said handle wafer and said active silicon layer using an etch mask defining an etch area, and said etch area overlaps at least a part of said membrane area.

A method includes forming a bumpstop from a first intermetal dielectric (IMD) layer and forming a via within the first IMD, wherein the first IMD is disposed over a first polysilicon layer, and wherein the first polysilicon layer is disposed over another IMD layer that is disposed over a substrate. The method further includes depositing a second polysilicon layer over the bumpstop and further over the via to connect to the first polysilicon layer. A standoff is formed over a first portion of the second polysilicon layer, and wherein a second portion of the second polysilicon layer is exposed. The method includes depositing a bond layer over the standoff.

A MEMS package includes a wafer with an interconnect layer. A first device layer includes a first MEMS device having a first thickness, is disposed on the wafer and bonded to the interconnect layer. A second device layer includes a second MEMS device having a second thickness thinner than the first thickness, is laterally spaced apart from the first device layer, disposed on the wafer and bonded to the interconnect layer. A first cap substrate with a first cavity is bonded to the first device layer. The first MEMS device corresponds to the first cavity. A second cap substrate with a second cavity is laterally spaced apart from the first cap substrate and bonded to the second device layer. The second MEMS device corresponds to the second cavity.

A device includes a substrate comprising a first standoff, a second standoff, a third standoff, a first cavity, a second cavity, and a bonding material covering a portion of the first, the second, and the third standoff. The first cavity is positioned between the first and the second standoffs, and the second cavity is positioned between the second and the third standoffs. The first cavity comprises a first cavity region and a second cavity region separated by a portion of the substrate extruding thereto, and wherein a depth associated with the first cavity region is greater than a depth associated with the second cavity. A surface of the first cavity is covered with a getter material.

A device includes a substrate comprising a first standoff, a second standoff, a third standoff, a first cavity, a second cavity, and a bonding material covering a portion of the first, the second, and the third standoff. The first cavity is positioned between the first and the second standoffs, and the second cavity is positioned between the second and the third standoffs. The first cavity comprises a first cavity region and a second cavity region separated by a portion of the substrate extruding thereto, and wherein a depth associated with the first cavity region is greater than a depth associated with the second cavity. A surface of the first cavity is covered with a getter material.

A MEMS device includes a substrate having a front surface and a rear surface, a recess formed in the front surface of the substrate, and a movable electrode and a fixed electrode connected to the substrate and disposed in such a manner as to face each other in the air above the recess. The movable electrode includes an embedded oxide layer embedded in a trench formed in the movable layer. A manufacturing method of a MEMS device includes forming a trench by etching the front surface of the substrate, and forming the embedded oxide layer in the trench by oxidating side surfaces and bottom surface of the trench.

A device includes one or more layers of a microelectromechanical system (MEMS) structure and a dielectric stack over the one or more layers. The dielectric stack includes a first dielectric layer having a first index of refraction, and a second dielectric layer having a second index of refraction different than the first index of refraction.