Methods of chemically encoding high-resolution shapes in silicon nanowires during metal nanoparticle catalyzed vapor-liquid-solid growth or vapor-solid-solid growth are provided. In situ phosphorus or boron doping of the silicon nanowires can be controlled during the growth of the silicon nanowires such that high-resolution shapes can be etched along a growth axis on the silicon nanowires. Nanowires with an encoded morphology can have high-resolution shapes with a size resolution of about 1,000 nm to about 10 nm and comprise geometrical shapes, conical profiles, nanogaps and gratings.

A method of fabricating a semiconductor device, includes, in part, growing a first layer of oxide on a surface of a first semiconductor substrate, forming a layer of insulating material on the oxide layer, patterning and etching the insulating material and the first oxide layer to form a multitude of oxide-insulator structures and further to expose the surface of the semiconductor substrate, growing a second layer of oxide in the exposed surface of the semiconductor substrate, and removing the second layer of oxide thereby to form a cavity in which a MEMS device is formed. The process of growing oxide in the exposed surface of the cavity and removing this oxide may be repeated until the cavity depth reaches a predefined value. Optionally, a multitude of bump stops is formed in the cavity.

After forming a microelectromechanical-system (MEMS) resonator within a silicon-on-insulator (SOI) wafer, a complementary metal oxide semiconductor (CMOS) cover wafer is bonded to the SOI wafer via one or more eutectic solder bonds that implement respective paths of electrical conductivity between the two wafers and hermetically seal the MEMS resonator within a chamber.

A method of fabricating a semiconductor device, includes, in part, growing a first layer of oxide on a surface of a first semiconductor substrate, forming a layer of insulating material on the oxide layer, patterning and etching the insulating material and the first oxide layer to form a multitude of oxide-insulator structures and further to expose the surface of the semiconductor substrate, growing a second layer of oxide in the exposed surface of the semiconductor substrate, and removing the second layer of oxide thereby to form a cavity in which a MEMS device is formed. The process of growing oxide in the exposed surface of the cavity and removing this oxide may be repeated until the cavity depth reaches a predefined value. Optionally, a multitude of bump stops is formed in the cavity.

A microelectromechanical system (MEMS) resonator includes a substrate having a substantially planar surface and a resonant member having sidewalls disposed in a nominally perpendicular orientation with respect to the planar surface. Impurity dopant is introduced via the sidewalls of the resonant member such that a non-uniform dopant concentration profile is established along axis extending between the sidewalls parallel to the substrate surface and exhibits a relative minimum concentration in a middle region of the axis.

A method of processing a semiconductor substrate having a first conductivity type includes, in part, forming a first implant region of a second conductivity type in the semiconductor substrate where the first implant region is characterized by a first depth, forming a second implant region of the first conductivity type in the semiconductor substrate where the second implant region is characterized by a second depth smaller than the first depth, forming a porous layer within the semiconductor substrate where the porous layer is adjacent the first implant region, and growing an epitaxial layer on the semiconductor substrate thereby causing the porous layer to collapse and form a cavity.

A micromechanical structure is described, including: at least one elastically deformable first area, which includes a defined piezoelectrically doped second area, at least in sections; at least one fourth area, into which the electrical charges generated in the second area may be conducted; and at least one third area connected electrically to the second and fourth area, in which an electrical current flowing through is convertible into thermal energy.

A semiconductor layer having an opening and a MEMS resonator formed in the opening is disposed between first and second substrates to encapsulate the MEMS resonator. An electrical contact that extends from the opening to an exterior of the MEMS device is formed at least in part within the semiconductor layer and at least in part within the first substrate.

A MEMS device is provided that includes a piezoelectric element including a piezoelectric membrane including a ferroelectric and configured to vibrate based on an application of a voltage. A device may include a diode portion electrically connected in parallel to the piezoelectric element and including a diode.

A semiconductor layer having an opening and a MEMS resonator formed in the opening is disposed between first and second substrates to encapsulate the MEMS resonator. An electrical contact that extends from the opening to an exterior of the MEMS device is formed at least in part within the semiconductor layer and at least in part within the first substrate.