Apparatus and Methods for fabricating apparatus having a hermetic seal to seal a portion of an apparatus, for example and without limitation, a portion having a MEMS sensor. One such method uses crimping devices to compress a seal in a cavity formed in a housing that includes a MEMS sensor attached to a stress isolator. Under such compression, the seal deforms to hermetically seal surfaces around the inside, outside and bottom of the stress isolator.

A method includes: providing a first substrate on which a plurality of first semiconductor devices is formed; providing a second substrate on which a plurality of second semiconductor devices is formed; and coupling the first and second substrates by contacting respective dummy pads of the first and second substrates, wherein at least one of the dummy pads of the first and second substrates comprises plural peaks and valleys.

In described examples, a device mounted on a substrate includes an encapsulant. In at least one example, an encapsulant barrier is deposited along a scribe line, along which the substrate is singulatable. To encapsulate one or more terminals of the substrate, an encapsulant is deposited between the encapsulant barrier and an edge of the device parallel to the encapsulant barrier.

In described examples, a bondline structure is arranged along a periphery of a cavity. The bondline structure extends from a first substrate and is configured to bond with an interposer arranged on a second substrate. A diffusion barrier is arranged on the first substrate for contacting the interposer. The diffusion barrier is arranged to impede a contaminant against migrating from the bondline structure and entering the cavity.

A device and method of forming the device that includes a first substrate having a cavity on a bottom surface of the first substrate and MEMS components formed on the first substrate and in the cavity; a second substrate having an upper surface; a first metal bond that extends around a perimeter of the cavity and forming a first connection between the bottom surface of first substrate and the upper surface of the second substrate; a second metal bond that extends around a perimeter of the first metal bond and spaced from the first metal bond, the second metal bond forming a second connection between the bottom surface of the first substrate and the upper surface of the second substrate; where the MEMS components are hermetically sealed between the first and second substrates. A getter agent can be between the first and second metal bonds.

A semiconductor device package includes a carrier, a wall disposed on a top surface of the carrier, a cover, and a sensor element. The cover includes a portion protruding from a bottom surface of the cover, where the protruding portion of the cover contacts a top surface of the wall to define a space. The sensor element is positioned in the space.

An optical detector device including: a glass substrate having conductive traces plated thereon; a semiconductor device having an optical detector exposed on a side facing the glass substrate, the semiconductor device further including a plurality of bond pads electrically coupled to a first subset of the conductive traces; a metallic seal structure bonding a side of the glass substrate having the conductive traces with the side of the semiconductor device facing the glass substrate; and a plurality of conductive structures outside of a perimeter of the semiconductor device, the plurality of conductive structures being electrically coupled to a second subset of the conductive traces.

A method for setting a pressure in a cavity formed with the aid of a substrate and a substrate cap, a microelectromechanical system being situated in the cavity, the substrate including a main extension plane. The method includes the following steps: in a first step a clearance is created in the substrate cap, the clearance connecting the cavity to the surroundings, a first clearance end of the clearance being formed on a first surface of the substrate cap that faces away from the cavity, a second clearance end of the clearance being formed on a cavity-side second surface of the substrate cap, the first clearance end and the second clearance end being situated at a distance from one another at least in a first direction which is parallel to the main extension plane; in a second step, after the first step, the clearance is sealed.

A ring-like sealing frame (3) and a bump (4) are simultaneously formed on a main surface of a first substrate (1) by patterning a metal paste. A ring-like protrusion (8) having a smaller width than a width of the sealing frame (3) is formed on a main surface of a second substrate (5). The main surface of the first substrate (1) and the main surface of the second substrate (5) are aligned to face each other. The sealing flame (3) is bonded to the protrusion (8), and the bump (4) is electrically bonded to the second substrate (5). A height of the protrusion (8) is 0.4 to 0.7 times a distance between the first substrate (1) and the second substrate (2) after bonding.

Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.