Patent classifications
B81C2203/035
Infrared device
The invention relates to an infrared device comprising a resistive element suspended in a cavity formed in a main element, and capable of transmitting infrared radiation when it is fed with an electric current. In particular, the main element is at least partly covered on the outer surface thereof and/or the inner surface thereof with a reflective coating. The use of the reflective coating makes it possible to at least partly contain infrared radiation transmitted by the resistive element in the cavity.
Single Line Axis Solder Dispense Process for a MEMS Device
A microphone assembly includes a substrate defining a port, a MEMS transducer, a guard ring, and a can. The MEMS transducer is coupled to the substrate such that the MEMS transducer is positioned over the port. The guard ring is coupled to the substrate and surrounds the MEMS transducer. The guard ring includes a plurality of edges that further includes a first edge and an opposing second edge. A portion of the first edge and a portion of the second edge have a reduced thickness relative to adjacent ones of the plurality of edges. The can is coupled to the guard ring such that the substrate and the can cooperatively define an interior cavity.
PIEZOELECTRIC ANTI-STICTION STRUCTURE FOR MICROELECTROMECHANICAL SYSTEMS
Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a first dielectric structure disposed over a first semiconductor substrate, where the first dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the first dielectric structure and includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity. A first piezoelectric anti-stiction structure is disposed between the movable mass and the first dielectric structure, wherein the first piezoelectric anti-stiction structure includes a first piezoelectric structure and a first electrode disposed between the first piezoelectric structure and the first dielectric structure
Semiconductor integrated device with electrical contacts between stacked dies and corresponding manufacturing process
An integrated device includes: a first die; a second die coupled in a stacked way on the first die along a vertical axis; a coupling region arranged between facing surfaces of the first die and of the second die, which face one another along the vertical axis and lie in a horizontal plane orthogonal to the vertical axis, for mechanical coupling of the first and second dies; electrical-contact elements carried by the facing surfaces of the first and second dies, aligned in pairs along the vertical axis; and conductive regions arranged between the pairs of electrical-contact elements carried by the facing surfaces of the first and second dies, for their electrical coupling. Supporting elements are arranged at the facing surface of at least one of the first and second dies and elastically support respective electrical-contact elements.
Electronic device with stud bumps
An electronic device is disclosed. In an embodiment an electronic device includes a carrier board having an upper surface and an electronic chip mounted on the upper surface of the carrier board, the electronic chip having a mounting side facing the upper surface of the carrier board, a top side facing away from the upper surface of the carrier board, and sidewalls connecting the mounting side to the top side, wherein the electronic chip has equal to or less than 5 stud bumps per square millimeter of a base area of the mounting side, and wherein a laminated polymer hood at least partly covers the top side of the electronic chip and extends onto the upper surface of the carrier board.
CAPPING PLATE FOR PANEL SCALE PACKAGING OF MEMS PRODUCTS
A method of manufacturing MEMS housings includes: providing glass spacers; providing a window plate; attaching the window plate to the glass spacers; aligning the glass spacers with a device glass plate having MEMS devices thereon; bonding the glass spacers to the device glass plate; and singulating the glass spacers, window plate, and device glass plate to produce the MEMS housings.
CONDUCTIVE BOND STRUCTURE TO INCREASE MEMBRANE SENSITIVTY IN MEMS DEVICE
Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device including a conductive bonding structure disposed between a substrate and a MEMS substrate. An interconnect structure overlies the substrate. The MEMS substrate overlies the interconnect structure and includes a moveable membrane. A dielectric structure is disposed between the interconnect structure and the MEMS substrate. The conductive bonding structure is sandwiched between the interconnect structure and the MEMS substrate. The conductive bonding structure is spaced laterally between sidewalls of the dielectric structure. The conductive bonding structure, the MEMS substrate, and the interconnect structure at least partially define a cavity. The moveable membrane overlies the cavity and is spaced laterally between sidewalls of the conductive bonding structure.
Bonded structures
A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.
BOND STRUCTURES ON MEMS ELEMENT AND ASIC ELEMENT
A MEMS element is provided. The MEMS element includes: a substrate; a first passivation layer arranged on the substrate; a metal layer arranged on the first passivation layer; a second passivation layer arranged on the metal layer and on the first passivation layer; and a punch element, an electrically conductive diffusion-blocking layer being arranged on the punch element and on the second passivation layer, a first bonding element being arranged on the punch element.
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor package structure includes a substrate; a first die on the substrate, wherein an active surface of the first die is facing away from the substrate; a second die on the active surface of the first die, electrically connected to the first die through a plurality of conductive terminals; and a sealing structure on the active surface of the first die, surrounding the plurality of conductive terminals and abutting the second die thereby forming a cavity between the first die and the second die. A method for manufacturing the semiconductor package structure is also provided.