A semiconductor device structure is provided. The semiconductor device structure includes a first wafer comprising a first face and a second face opposite the first face and having a plurality of predetermined die areas. A plurality of recesses are disposed in the first face of the first wafer. A first recess of the plurality of recesses extends in a direction substantially parallel to a first edge of at least one of the plurality of predetermined die areas and laterally surrounds the at least one of the plurality of predetermined die areas. A second wafer is bonded to the second face of the first wafer.

A semiconductor device package includes a semiconductor device, a non-semiconductor substrate over the semiconductor device, and a first connection element extending from the semiconductor device to the non-semiconductor substrate and electrically connecting the semiconductor device to the non-semiconductor substrate.

A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.

A semiconductor package structure includes a substrate; a first die on the substrate, wherein an active surface of the first die is facing away from the substrate; a second die on the active surface of the first die, electrically connected to the first die through a plurality of conductive terminals; and a sealing structure on the active surface of the first die, surrounding the plurality of conductive terminals and abutting the second die thereby forming a cavity between the first die and the second die. A method for manufacturing the semiconductor package structure is also provided.

A MEMS device includes a layer stack having a plurality of MEMS layers arranged along a layer stack direction. The MEMS device includes a movable element formed in a first MEMS layer and arranged between a second MEMS layer and a third MEMS layer of the layer stack. A driving unit is further provided, comprising a first drive structure mechanically firmly connected to the movable element and a second drive structure mechanically firmly connected to the second MEMS layer. The driving unit is configured to generate on the movable member a drive force perpendicular to the layer stack direction, and the drive force is configured to deflect the movable member.

Disclosed a MEMS assembly and a manufacturing method thereof. The manufacturing method comprises: forming a groove on a sensor chip; forming a bonding pad on a circuit chip; bonding the sensor chip and the circuit chip together to form a bonding assembly; performing a first dicing process at a first position of the sensor chip to penetrate through the sensor chip to the groove; performing a second dicing process at a second position of the sensor chip to penetrate through the sensor chip and the circuit chip, for obtaining an individual MEMS assembly by singulating the bonding assembly, wherein location of the groove corresponds to a position of the bonding pad, and an opening is formed in the sensor chip to expose the bonding pad when the second dicing process is performed. The method uses two dicing process respectively achieving different depths to expose the bonding pad of the sensor chip and singulate the MEMS assembly, respectively, to improve yield and reliability.

A method of processing a double sided wafer of a microelectromechanical device includes spinning a resist onto a first side of a first wafer. The method further includes forming pathways within the resist to expose portions of the first side of the first wafer. The method also includes etching one or more depressions in the first side of the first wafer through the pathways, where each of the depressions have a planar surface and edges. Furthermore, the method includes depositing one or more adhesion metals over the resist such that the one or more adhesion metals are deposited within the depressions, and then removing the resist from the first wafer. The method finally includes depositing indium onto the adhesion metals deposited within the depressions and bonding a second wafer to the first wafer by compressing the indium between the second wafer and the first wafer.

A method of manufacturing a dielectric barrier discharge (DBD) structure includes forming a patterned electrode layer around an outer perimeter of a substrate composed of a dielectric material. The patterned electrode layer includes multiple electrodes around the outer perimeter of the substrate and gaps between adjacent electrodes. The method further includes depositing a dielectric layer over at least a first region of the patterned electrode layer to form a DBD region of the DBD structure.

A semiconductor device structure is provided. The semiconductor device structure includes a first substrate including a first face and a second face opposite the first face. A second substrate is bonded to the first face of the first substrate such that the second face of the first substrate faces away from the second substrate. One or more recesses are arranged in the second face of the first substrate and are configured to compensate for thermal expansion or thermal contraction.

Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.