B81C2203/035

BONDED STRUCTURES

A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

BONDING PROCESS FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE
20230365402 · 2023-11-16 ·

A semiconductor device structure is provided. The semiconductor device structure includes a first substrate including a first face and a second face opposite the first face. A second substrate is bonded to the first face of the first substrate such that the second face of the first substrate faces away from the second substrate. One or more recesses are arranged in the second face of the first substrate and are configured to compensate for thermal expansion or thermal contraction.

PACKAGING METHOD AND ASSOCIATED PACKAGING STRUCTURE
20230357002 · 2023-11-09 ·

The present disclosure provides a packaging method, including: providing a first semiconductor substrate; forming a bonding region on the first semiconductor substrate, wherein the bonding region of the first semiconductor substrate includes a first bonding metal layer and a second bonding metal layer; providing a second semiconductor substrate having a bonding region, wherein the bonding region of the second semiconductor substrate includes a third bonding layer; and bonding the first semiconductor substrate to the second semiconductor substrate by bringing the bonding region of the first semiconductor substrate in contact with the bonding region of the second semiconductor substrate; wherein the first and third bonding metal layers include copper (Cu), and the second bonding metal layer includes Tin (Sn). An associated packaging structure is also disclosed.

PACKAGING FOR A SENSOR AND METHODS OF MANUFACTURING THEREOF
20230314193 · 2023-10-05 ·

Certain embodiments of the present disclosure relate to a sensor assembly including a substrate having an outer region, an inner region, and a middle region between the outer region and the inner region. The substrate further includes electrical contact pads on at least the inner region. The sensor assembly further includes a housing coupled to the substrate at the middle region or the outer region to provide a hermetic seal. The sensor assembly further includes a sensor die bonded to the substrate at the inner region. A metal bond bonds electrodes of the sensor die to the electrical contact pads. The metal bond includes platinum, and/or one or more metals selected from tin, indium, copper, aluminum, and/or nickel.

PACKAGING FOR A SENSOR AND METHODS OF MANUFACTURING THEREOF
20230313376 · 2023-10-05 ·

Certain embodiments of the present disclosure relate to a sensor assembly including a housing having a first channel configured to flow a gas in a first direction and a second channel configured to flow the gas in a second direction. The housing is configured to couple to a gas flow assembly. A substrate is disposed within the housing. The substrate has an outer region, an inner region within the first channel, and a middle region between the outer region and the inner region. The substrate further includes electrical contact pads on at least the inner region. A sensor die is coupled to the inner region of the substrate, having an electrical connection to the electrical contact pads. The sensor die is disposed within a gas flow path of the first channel.

PACKAGING FOR A SENSOR AND METHODS OF MANUFACTURING THEREOF

Certain embodiments of the present disclosure relate to a sensor assembly including a substrate, a housing, and a sensor die. In certain embodiments, the substrate includes an outer region, an inner region, and a middle region between the outer region and the inner region. In certain embodiments, the substrate includes electrical contact pads on at least the inner region. In certain embodiments, the housing is coupled to the substrate at the middle region or the outer region to provide a hermetic seal. In certain embodiments, the sensor die is coupled to the substrate at the inner region via the electrical contact pads. The sensor die is aligned to the substrate via aligning features that align the sensor die relative to the substrate in at least one of a first plane or a second plane.

METHOD AND SYSTEM FOR FABRICATING A MEMS DEVICE
20230037849 · 2023-02-09 ·

A method includes forming a bumpstop from a first intermetal dielectric (IMD) layer and forming a via within the first IMD, wherein the first IMD is disposed over a first polysilicon layer, and wherein the first polysilicon layer is disposed over another IMD layer that is disposed over a substrate. The method further includes depositing a second polysilicon layer over the bumpstop and further over the via to connect to the first polysilicon layer. A standoff is formed over a first portion of the second polysilicon layer, and wherein a second portion of the second polysilicon layer is exposed. The method includes depositing a bond layer over the standoff.

METHOD AND SYSTEM FOR FABRICATING A MEMS DEVICE
20230045257 · 2023-02-09 ·

A device includes a substrate and an intermetal dielectric (IMD) layer disposed over the substrate. The device also includes a first plurality of polysilicon layers disposed over the IMD layer and over a bumpstop. The device also includes a second plurality of polysilicon layers disposed within the IMD layer. The device includes a patterned actuator layer with a first side and a second side, wherein the first side of the patterned actuator layer is lined with a polysilicon layer, and wherein the first side of the patterned actuator layer faces the bumpstop. The device further includes a standoff formed over the IMD layer, a via through the standoff making electrical contact with the polysilicon layer of the actuator and a portion of the second plurality of polysilicon layers and a bond material disposed on the second side of the patterned actuator layer.

Sensor with dimple features and improved out-of-plane stiction

A method includes fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a first mask on a second side of the device wafer, wherein the second side is planar. A plurality of dimple features is formed on an exposed portion on the second side of the device wafer. The first mask is removed from the second side of the device wafer. A second mask is deposited on the second side of the device wafer that corresponds to a standoff. An exposed portion on the second side of the device wafer is etched to form the standoff. The second mask is removed. A rough polysilicon layer is deposited on the second side of the device wafer. A eutectic bond layer is deposited on the standoff. In some embodiments, a micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.

Sensor Arrangement and Method for Fabricating A Sensor Arrangement

In an embodiment a sensor arrangement includes a sensor die having a contact area, a suspended area and a sensitive element located in the suspended area, an interposer including at least two vias connecting a first side of the interposer to a second side of the interposer and a support mechanically and electrically connecting the contact area of the sensor die to the first side of the interposer, the support including at least two contact joints.