A semiconductor device and method of manufacturing the device that includes a capacitive micromachined ultrasonic transducer (CMUT). The CMUT includes an integrated circuit substrate, and a sensing electrode positioned on the integrated substrate. The sensing electrode includes a sidewall that forms a wall of an isolation trench adjacent to the sensing electrode, and is patterned before covering dielectric layers are deposited. After patterning of the sensing electrode, one or more dielectric layers are patterned, with one dielectric layer patterned on the sensing electrode and sidewall, and which has a thickness corresponding to the surface roughness of the sensing electrode. The CMUT further includes a membrane positioned above the sensing electrode forming a cavity therein.

A ultrasonic transducer device includes a transducer bottom electrode layer disposed over a substrate, and a plurality of vias that electrically connect the bottom electrode layer with the substrate, wherein substantially an entirety of the plurality of vias are disposed directly below a footprint of a transducer cavity. Alternatively, the transducer bottom electrode layer includes a first metal layer in contact with the plurality of vias and a second metal layer formed on the first metal layer, the first metal layer including a same material as the plurality of vias.

A method includes depositing a passivation layer on a substrate; depositing and patterning a first polysilicon layer on the passivation layer; depositing and patterning a first oxide layer on the first polysilicon layer forming a patterned first oxide layer; depositing and patterning a second polysilicon layer on the patterned first oxide layer. A portion of the second polysilicon layer directly contacts a portion of the first polysilicon layer. A portion of the patterned second polysilicon layer corresponds to a bottom electrode. A second oxide layer is deposited on the patterned second polysilicon layer and on an exposed portion of the patterned first oxide layer. A portion of the second oxide layer corresponding to a sensing cavity is etched, exposing the bottom electrode. Another substrate is bonded to the second oxide layer enclosing the sensing cavity. A top electrode is disposed within the another substrate and positioned over the bottom electrode.

This disclosure describes a comprising a handle wafer and a device wafer which is bonded to the handle wafer. The handle wafer comprises a cavity and the device wafer comprises a mobile rotor part above the cavity. A bottom coating layer covers at least a part of the bottom surface of the rotor.

A microelectromechanical system device includes a substrate, a dielectric layer, an electrode, a surface modification layer and a membrane. The dielectric layer is formed on the substrate, and is formed with a cavity that is defined by a cavity-defining wall. The electrode is formed in the dielectric layer. The surface modification layer covers the cavity-defining wall, and has a plurality of hydrophobic end groups. The membrane is connected to the dielectric layer, and seals the cavity. The membrane is movable toward or away from the electrode. A method for making a microelectromechanical system device is also provided.

A hermetically sealed package includes: at least one cover substrate which is sheet-like and includes a flat outer surface and a circumferential narrow side, the at least one cover substrate being formed as a transparent thin film substrate, the at least one cover substrate having a thickness of less than 200 μm; a second substrate which is adjoined to the at least one cover substrate and in direct contact with the at least one cover substrate; at least one functional area enclosed by the hermetically sealed package, the at least one functional area being between the at least one cover substrate and the second substrate; and a laser bonding line which joins the at least one cover substrate and the second substrate directly and in a hermetically tight manner.

The present disclosure relates to an optical scanner package comprising a scanner element, a lower substrate having an inner space, and a semi-spherical transmissive window. The semi-spherical transmissive window has different inclinations in an incident position thereof and in an emission position thereof, and interference caused by sub-reflection can thus be reduced. Since the incident angle α and the maximum emission angle β are small, anti-reflection coating design is easy, and light loss can be reduced. There is an advantage in that, even when the optical scanning angle (OSA) γ of a laser is large, the maximum emission angle β is small, and emitted laser light thus has a small change in characteristics. In addition, since there are curvatures on both sides of two axes, there is little restriction regarding the incident direction even in the case of two-axis driving.

In described examples, apparatus includes a first substrate that delimits a surface of a cavity and a bondline structure arranged along a periphery of the cavity, where the bondline structure extends from the first substrate, and the bondline structure configured to bond with an interposer arranged on a second substrate. The apparatus also includes a diffusion barrier on the first substrate, the diffusion barrier configured to contact the interposer and impede a contaminant against migrating from the bondline structure and entering the cavity.

Methods for fabricating MEMS tuning fork gyroscope sensor system using silicon wafers. This provides the possibly to avoid glass. The sense plates can be formed in a device layer of a silicon on insulator (SOI) wafer or in a deposited polysilicon layer in a few examples.

A semiconductor pressure sensor includes: a first silicon substrate including a first recessed part; and a second silicon substrate including a diaphragm covering a first space in the first recessed part, the second silicon substrate being configured to hermetically seal the first space. In cross-section, a plurality of second spaces are hermetically sealed in a state of being separated away from the first space between the first silicon substrate and the second silicon substrate, and are provided in one of or each of a first end side and a second end side of the first space.