B81C2203/037

METHOD FOR MANUFACTURING A MEMS SENSOR
20210309512 · 2021-10-07 ·

A method for manufacturing a MEMS sensor. The method includes: providing a substrate, applying a support layer onto a back side of the substrate, forming at least one cavity in the substrate in such a way that an access to the back side from the front side is formed, introducing a MEMS structure into the at least one cavity, and fixing the MEMS structure on the support layer.

ENCAPSULATED MICROELECTROMECHANICAL STRUCTURE
20210221678 · 2021-07-22 ·

A semiconductor layer having an opening and a MEMS resonator formed in the opening is disposed between first and second substrates to encapsulate the MEMS resonator. An electrical contact that extends from the opening to an exterior of the MEMS device is formed at least in part within the semiconductor layer and at least in part within the first substrate.

Through silicon via (TSV) formation in integrated circuits
11097942 · 2021-08-24 · ·

Integrated circuit substrates having through silicon vias (TSVs) are described. The TSVs are vias extending through the silicon substrate in which the integrated circuitry is formed. The TSVs may be formed prior to formation of the integrated circuitry on the integrated circuit substrate, allowing the use of via materials which can be fabricated at relatively small sizes. The integrated circuit substrates may be bonded with a substrate having a microelectromechanical systems (MEMS) device. In some such situations, the circuitry of the integrated circuit substrate may face away from the MEMS substrate since the TSVs may provide electrical connection from the circuitry side of the integrated circuit substrate to the MEMS device.

Nickel lanthanide alloys for MEMS packaging applications

A semiconductor package including a semiconductor die and at least one bondline positioned on the semiconductor die, the at least one bondline comprising a nickel lanthanide alloy diffusion barrier layer abutting a gold layer.

MICROELECTRONICS PACKAGE WITH VERTICALLY STACKED MEMS DEVICE AND CONTROLLER DEVICE
20210188624 · 2021-06-24 ·

The present disclosure relates to a microelectronics package with a vertically stacked structure of a microelectromechanical systems (MEMS) device and a controller device. The MEMS device includes a MEMS component, a MEMS through-via, and a MEMS connecting layer configured to electrically connect the MEMS component with the MEMS through-via. The controller device includes a controlling component, a controller through-via, and a controller connecting layer configured to electrically connect the controlling component with the controller through-via. The controller through-via is in contact with the MEMS through-via, such that the controlling component in the controller device is configured to control the MEMS component in the MEMS device.

MEMS DEVICE AND PROCESS

The present disclosure describes techniques for altering the epoxy wettability of a surface of a MEMS device. Particularly applicable to flip-chip bonding arrangements in which a top surface of a MEMS device is adhered to a package substrate. A barrier region is provided on a top surface of the MEMs device, laterally outside a region which forms, or overlies, the backplate and/or the cavity in the transducer substrate. The barrier region comprises a plurality of discontinuities, e.g. dimples, which inhibit the flow of epoxy.

Protective wafer including inclined optical windows and device
10996461 · 2021-05-04 · ·

A method for manufacturing a protective wafer including a frame wafer and an optical window, and to a method for manufacturing a micromechanical device including such a protective wafer having an inclined optical window. Also described are a protective wafer including a frame wafer and an optical window, and a micromechanical device including a MEMS wafer and such a protective wafer, which delimit a cavity, the protective wafer including an inclined optical window.

Package moisture control and leak mitigation for high vacuum sealed devices

A device and method of forming the device that includes a first substrate having a cavity on a bottom surface of the first substrate and MEMS components formed on the first substrate and in the cavity; a second substrate having an upper surface; a first metal bond that extends around a perimeter of the cavity and forming a first connection between the bottom surface of first substrate and the upper surface of the second substrate; a second metal bond that extends around a perimeter of the first metal bond and spaced from the first metal bond, the second metal bond forming a second connection between the bottom surface of the first substrate and the upper surface of the second substrate; where the MEMS components are hermetically sealed between the first and second substrates. A getter agent can be between the first and second metal bonds.

Packaged Semiconductor Die with Micro-Cavity and Method for Forming Packaged Semiconductor Die with Micro-Cavity

A packaged electronic die having a micro-cavity and a method for forming a packaged electronic die. The packaged electronic die includes a photoresist frame secured to the electronic die and extending completely around the device. The photoresist frame is further secured to a first major surface of a substrate so as to form an enclosure around the device. Encapsulant material extends over the electronic die and around the sides of the electronic die. The encapsulant material is in contact with the first major surface of the substrate around the entire periphery of the electronic die so as to form a seal around the electronic die.

METHOD FOR ENCAPSULATING A MICROELECTRONIC DEVICE, COMPRISING A STEP OF THINNING THE SUBSTRATE AND/OR THE ENCAPSULATION COVER

A method for encapsulating a microelectronic device, arranged on a support substrate, with an encapsulation cover includes, inter alia, the following sequence of steps: a) providing a support substrate on which a microelectronic device is arranged, b) depositing a bonding layer on the first face of the substrate, around the microelectronic device, c) positioning an encapsulation cover on the bonding layer in such a way as to encapsulate the microelectronic device, d) thinning the second main face of the support substrate and the second main face of the encapsulation cover by chemical etching.