A device includes a complementary metal-oxide-semiconductor (CMOS) wafer and a conductive shielding layer. The CMOS wafer includes a semiconductor substrate, at least one front-end-of-the-line (FEOL) element, at least one back-end-of-the-line (BEOL) element and at least one dielectric layer. The FEOL element is disposed on the semiconductor substrate, the dielectric layer is disposed on the semiconductor substrate, and the BEOL element is disposed on the dielectric layer. The conductive shielding layer is disposed on the dielectric layer, in which the conductive shielding layer is electrically connected to the semiconductor substrate. an orthogonal projection of the conductive shielding layer on the semiconductor substrate does not overlap with an orthogonal projection of the FEOL element on the semiconductor substrate.

Processes for integrating complementary metal-oxide-semiconductor (CMOS) devices with microelectromechanical systems (MEMS) devices are provided. In some embodiments, the MEMS devices are formed on a sacrificial substrate or wafer, the sacrificial substrate or wafer is bonded to a CMOS die or wafer, and the sacrificial substrate or wafer is removed. In other embodiments, the MEMS devices are formed over a sacrificial region of a CMOS die or wafer and the sacrificial region is subsequently removed. Integrated circuit (ICs) resulting from the processes are also provided.

Microelectromechanical systems (MEMS) packages and methods for forming the same are provided. The MEMS package includes a semiconductor substrate having a metallization layer over the semiconductor substrate. The MEMS package also includes a first planarization layer and an overlying second planarization layer over the metallization layer. The planarization structure has a first cavity therein exposing the metallization layer. The MEMS package also includes a MEMS device structure bonded to the second planarization layer. The MEMS device structure includes a moveable element over the first cavity. The MEMS package also includes a first stopper placed on the exposed metallization layer in the first cavity. The first stopper includes a patterned conductive layer and an underlying patterned insulating layer.

An electromechanical power switch device and methods thereof. At least some of the illustrative embodiments are devices including a semiconductor substrate, at least one integrated circuit device on a front surface of the semiconductor substrate, an insulating layer on the at least one integrated circuit device, and an electromechanical power switch on the insulating layer. By way of example, the electromechanical power switch may include a source and a drain, a body region disposed between the source and the drain, and a gate including a switching metal layer. In some embodiments, the body region includes a first body portion and a second body portion spaced a distance from the first body portion and defining a body discontinuity therebetween. Additionally, in various examples, the switching metal layer may be disposed over the body discontinuity.

An ultrasound transducer device includes an electrode, a membrane separated from the electrode by a cavity between the membrane and the electrode, a patterned membrane support layer that defines a size and shape of the cavity and that is disposed between the electrode and the membrane, and vias that electrically connect the electrode to a substrate. The vias are disposed in the ultrasound transducer device such that less than 50% of the vias overlap with a support surface of the patterned membrane support layer, in a plan view.

Methods of operating a switching device are provided. The switching device is formed in an interconnect, the interconnect including a plurality of metallization levels, and has an assembly that includes a beam held by a structure. The beam and structure are located within the same metallization level. Locations of fixing of the structure on the beam are arranged so as to define for the beam a pivot point situated between these fixing locations. The structure is substantially symmetric with respect to the beam and to a plane perpendicular to the beam in the absence of a potential difference. The beam is able to pivot in a first direction in the presence of a first potential difference applied between a first part of the structure and to pivot in a second direction in the presence of a second potential difference applied between a second part of the structure.

The present invention disclosed a micro acoustic collector and CMOS microphone single chip. The micro acoustic collector comprising: a plurality of leaf-shaped structures annularly arranged with symmetry, each of the plurality of leaf-shaped structure having a suspended arm and a restrained arm, and the suspended arm of the plurality of leaf-shaped structures connected to a suspended fulcrum, and a plurality of through-vias formed in the suspended fulcrum and the plurality of leaf-shaped structures; a plurality of support pillars uniformly disposed under edges of the plurality of leaf-shaped structures corresponding to the restrained arms and the suspend arms; and a base metal layer formed under and insulated from the plurality of support pillars, and facing towards the inner-annular-supported acoustic collection film to form a hollow space.

The present invention disclosed a micro acoustic collector with a lateral cavity, comprising: a base metal layer; a movable film, an annular side wall; a lateral metal layer. The movable film faces towards the base metal layer to form a hollow space. The lateral metal layer is formed at a side of the movable film and around the movable film, fixed by the annular side wall and spaced apart from peripheral of the movable film by a distance, and the lateral metal layer faces towards the base metal layer to form a lateral cavity to assist an acoustic collection.

The present disclosure relates to a microelectromechanical systems (MEMS) package featuring a flat plate having a raised edge around its perimeter serving as an anti-stiction device, and an associated method of formation. A CMOS IC is provided having a dielectric structure surrounding a plurality of conductive interconnect layers disposed over a CMOS substrate. A MEMS IC is bonded to the dielectric structure such that it forms a cavity with a lowered central portion the dielectric structure, and the MEMS IC includes a movable mass that is arranged within the cavity. The CMOS IC includes an anti-stiction plate disposed under the movable mass. The anti-stiction plate is made of a conductive material and has a raised edge surrounding at least a part of a perimeter of a substantially planar upper surface.

An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.