A method including fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a hardmask on a second side of the device wafer, wherein the second side is planar. An etch stop layer is deposited over the hardmask and an exposed portion of the second side of the device wafer. A dielectric layer is formed over the etch stop layer. A via is formed within the dielectric layer. The via is filled with conductive material. A eutectic bond layer is formed over the conductive material. Portions of the dielectric layer uncovered by the eutectic bond layer is etched to expose the etch stop layer. The exposed portions of the etch stop layer is etched. A micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.

A micromechanical sensor, including a micromechanical chip having a first micromechanical structure, a first evaluation chip, having a first application-specific integrated circuit, and a second evaluation chip having a second application-specific integrated circuit. The first evaluation chip and the micromechanical chip are situated in a stacked manner, the micromechanical chip being directly electrically conductively connected with the first evaluation chip and the first evaluation chip being directly electrically conductively connected with the second evaluation chip. The first application-specific integrated circuit primarily includes analog circuit elements and the second application-specific circuit primarily includes digital circuit elements.

A method of manufacturing a semiconductor structure includes providing a first substrate, disposing and patterning a plate over the first substrate, disposing a first sacrificial oxide layer over the plate, forming a plurality of recesses over a surface of the first sacrificial oxide layer, disposing and patterning a membrane over the first sacrificial oxide layer, disposing a second sacrificial oxide layer to surround the membrane and cover the first sacrificial oxide layer; and forming a plurality of conductive plugs passing through the plate or the membrane, wherein the plate includes a semiconductive member and a tensile member, and the semiconductive member is disposed within the tensile member.

A semiconductor package includes a first die having a first surface, a first conductive bump over the first surface and having first height and a first width, a second conductive bump over the first surface and having a second height and a second width. The first width is greater than the second width and the first height is substantially identical to the second height. A method for manufacturing the semiconductor package is also provided.

A micro-electro-mechanical system (MEMS) package structure and a method of fabricating the MEMS package structure. The MEMS package structure includes a MEMS die (210,220) and a device wafer (100). A control unit and an interconnection structure (300) are formed in the device wafer (100), and a first contact pad (410) is formed on a first surface (100a) of the device wafer. The MEMS die (210,220) includes a micro-cavity (221), a second contact pad (201) configured to be coupled to an external electrical signal, and a bonding surface (200a,220a). The micro-cavity (221) of the MEMS die (210,220) is provided with a through hole (221a) in communication with the exterior of the die. The MEMS die (210,220) is bonded to the first surface (100a) by a bonding layer (500), in which an opening (510) is formed. The first contact pad (410) is electrically connected to the second contact pad (201), and a rewiring layer (700) is arranged on a second surface (100b) opposing the first surface (100a). The MEMS package structure allows electrical interconnection between the MEMS die and the device wafer with a reduced package size, compared to those produced by existing integration techniques. In addition, a plurality of MEMS dies of the same or different structures and functions are allowed to be integrated on the same device wafer.

A micro-electro-mechanical system (MEMS) package structure and a method for fabricating the MEMS package structure. The MEMS package structure includes a MEMS die (210,220) and a device wafer (100). The MEMS die (210,220) is arranged on a first surface (100a) of the device wafer and includes a closed micro-cavity (211,221) and a contact pad (212,222) configured to be coupled to an external electrical signal. In the device wafer (100), there are arranged a control unit and an interconnection structure (300) electrically connected to each of the contact pad (212,222) and the control unit. On a second surface (100b) of the device wafer, there is arranged a rewiring layer (400) electrically connected to the interconnection structure (300). According to the MEMS package structure fabrication method, arranging the MEMS die (210,220) and the rewiring layer (400) on opposing sides of the device wafer (100) is conducive to shrinkage of the MEMS package structure. In addition, the MEMS package structure allows the integration of a plurality of MEMS dies of the same or different structures and functions on the same device wafer.

In some implementations a semiconductor die comprises a semiconductor chip. The semiconductor chip comprises a piezoresistive pressure sensor element and at least one capacitive acceleration sensor element. The piezoresistive pressure sensor element is arranged to the side of the capacitive acceleration sensor element. In some implementations, a method for producing a semiconductor die includes applying an insulation layer to the semiconductor wafer. A section of the monocrystalline cover layer may be exposed by structuring the insulation layer. A semiconductor layer having a monocrystalline section and a polycrystalline section may be generated by deposition of a semiconductor material.

The integrated CMOS-MEMS device includes a CMOS structure, a cap structure, and a MEMS structure. The CMOS structure, fabricated on a first substrate, includes at least one conducting layer. The cap structure, including vias passing through the cap structure, has an isolation layer deposited on its first side and has a conductive routing layer deposited on its second side. The MEMS structure is deposited between the first substrate and the cap structure. The integrated CMOS-MEMS device also includes a conductive connector that passes through one of the vias and through an opening in the isolation layer on the cap structure. The conductive connector conductively connects a conductive path in the conductive routing layer on the cap structure with the at least one conducting layer of the CMOS structure.

A manufacturing method for a micromechanical component. The method includes: providing an ASIC component including first front and rear sides, a strip conductor unit being provided at the first front side; providing a MEMS component including second front and rear sides, a micromechanical functional element situated in a cavity at the second front side; bonding the first front side onto the second front side; back-thinning the first rear side; forming vias starting from the back-thinned first rear side and from a redistribution unit on the first rear side, the vias electrically connecting the strip conductor unit to the redistribution unit; forming electrical contact elements on the redistribution unit; and back-thinning the second rear side. The back-thinning of the first and second rear side taking place so that a thickness of the stack made up of ASIC component and MEMS component is less than 300 micrometers.

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a metallization layer over the substrate, and a sensing structure over the metallization layer. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier in proximity to a top surface of the outgassing layer, the patterned outgassing barrier exposing a portion of the outgassing layer, and an electrode over the patterned outgassing barrier. The method for manufacturing the semiconductor device is also provided.