A MEMS component including a first substrate having at least one first insulating layer and a first metallic coating on a first side; and including a second substrate having at least one second insulating layer and a second metallic coating on a second side, the second substrate including a micromechanical functional element, which is connected electroconductively to the second metallic layer. The first side and the second side are positioned on each other, the first insulating layer and the second insulating layer being interconnected, and the first metallic coating and the second metallic coating being interconnected. A method for manufacturing a MEMS component is also described.

Described are transducer assemblies and imaging devices comprising: a microelectromechanical systems (MEMS) die including a plurality of piezoelectric elements; a complementary metal-oxide-semiconductor (CMOS) die electrically coupled to the MEMS die by a first plurality of bumps and including at least one circuit for controlling the plurality of piezoelectric elements; and a package secured to the CMOS die by an adhesive layer and electrically connected to the CMOS die.

Microelectromechanical (MEMS) devices and associated methods are disclosed. Piezoelectric MEMS transducers (PMUTs) suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuit (IC), as well as PMUT arrays having high fill factor for fingerprint sensing, are described.

A transducer assembly includes: a microelectromechanical systems (MEMS) die including a plurality of piezoelectric elements; a complementary metal-oxide-semiconductor (CMOS) die electrically coupled to the MEMS die by a first plurality of bumps and including at least one circuit for controlling the plurality of piezoelectric elements; and a package secured to the CMOS die by an adhesive layer and electrically connected to the CMOS die.

A semiconductor device package includes a redistribution layer structure, a semiconductor component, an encapsulant and a sensing component. The semiconductor component is disposed on a top surface of the RDL structure. The encapsulant covers the semiconductor component, the RDL structure, and an electrical connection member. The sensing component is disposed on a top surface of the encapsulant. The electrical connection member is in contact with a pad of the semiconductor component and has a first surface exposed from the top surface of the encapsulant, and the semiconductor component package includes a wire connecting the sensing component and the first surface of the electrical connection member.

An ultrasonic transducer includes a membrane, a bottom electrode, and a plurality of cavities disposed between the membrane and the bottom electrode, each of the plurality of cavities corresponding to an individual transducer cell. Portions of the bottom electrode corresponding to each individual transducer cell are electrically isolated from one another. Each portion of the bottom electrode corresponds to each individual transducer that cell further includes a first bottom electrode portion and a second bottom electrode portion, the first and second bottom electrode portions electrically isolated from one another.

A production method for a micromechanical sensor apparatus. The method includes: providing a bonded wafer stack comprising an ASIC wafer and a MEMS wafer, the ASIC wafer including ASIC switching devices and the MEMS wafer including MEMS sensor devices, an ASIC switching device and a corresponding MEMS sensor device are arranged one above the other such that they form a respective micromechanical sensor apparatus in the bonded wafer stack; providing a first packaging wafer having first front and rear faces; in the first rear face, the first packaging wafer has blind holes assigned to corresponding sensor detection regions of a respective MEMS sensor device; bonding the first rear face to the wafer stack such that the blind holes are each in fluid connection with the corresponding sensor detection region; backthinning, on the first front face, the first packaging wafer bonded to the wafer stack to expose the blind holes.

A semiconductor device may include a first substrate, a first electrical component, a lid, a second substrate, and a second electrical component. The first substrate may include an upper surface, a lower surface, and an upper cavity in the upper surface. The first electrical component may reside in the upper cavity of the first substrate. The lid may cover the upper cavity and may include a port that permits fluid to flow between an environment external to the semiconductor device and the upper cavity. The second substrate may include the second electrical component mounted to an upper surface of the second substrate. The lower surface of the first substrate and the upper surface of the second substrate may fluidically seal the second electrical component from the upper cavity.

An integrated semiconductor device includes: a MEMS structure; an ASIC electronic circuit; and conductive interconnection structures electrically coupling the MEMS structure to the ASIC electronic circuit. The MEMS structure and the ASIC electronic circuit are integrated starting from a same substrate including semiconductor material; wherein the MEMS structure is formed at a first surface of the substrate, and the ASIC electronic circuit is formed at a second surface of the substrate, vertically opposite to the first surface in a direction transverse to a horizontal plane of extension of the first surface and of the second surface.

A Microelectromechanical Systems (MEMS) device combining a MEMS layer and a Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuit (IC), and its fabrication method is provided. The fabrication method includes: processing the MEMS layer on a first semiconductor substrate, the MEMS layer including one or more movable structures and one or more anchor structures; processing one or more first contacts on the first semiconductor substrate, each first contact being processed into one of the anchor structures and being configured to bias that anchor structure; processing the CMOS IC on a second semiconductor substrate; processing one or more second contacts on the second semiconductor substrate, each second contact being connected to the CMOS IC; and bonding the first semiconductor substrate to the second semiconductor substrate such that each first contact directly contacts one of the second contacts. The method can allow fabricating the MEMS device without vapor HF etching. The method can further enable zero level packaging, fusion bonding, a C-SOI approach, and high-vacuum sealing. An integrated zero level hermetic packaging MEMS device can be realized based on fusion bonding of moisture resistant materials. Further, Cu/dielectric bonding and electrical connections to individual parts of the MEMS device are allowed, in order to apply isolated voltages.