Patent classifications
B01D67/0062
Semiconductor devices and methods of manufacture
A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.
High-flux efficiency filter fabrication using a flip bond process with supportive structure
A first wafer has a first stop layer deposited on a substrate, the substrate used to form a base support structure. A second wafer has a second stop layer deposited on a sacrificial substrate, and a filter layer deposited on the second stop layer. A rib layer is deposited on one of: the first stop layer of the first layer; or a third stop layer that is deposited over the filter layer. A rib pattern is formed in the rib layer. The first and second wafers are flip bonded such that the rib pattern is joined between the filter layer and the first stop layer. Elongated voids are formed within the filter layer. The base support structure is formed within the substrate of the first wafer such that there is a fluid flow path between the base support structure, the rib layer, and the elongated voids of the filter layer.
Precision fabrication of nanosieves
An exemplary method includes forming a sacrificial layer along sidewalls of an array of trenches that are indented into a substrate, depositing a fill layer over the sacrificial layer, and then creating an array of gaps between the fill layer and the substrate by removing the sacrificial layer along the sidewalls of the trenches, while maintaining a structural connection between the substrate and the fill layer at the floors of the trenches. The method further includes covering the substrate, the fill layer, and the gaps with a cap layer that seal fluid-tight against the substrate and the fill layer. The method further includes indenting a first reservoir and a second reservoir through the cap layer, and into the substrate and the fill layer, across the lengths of the array of gaps, so that the array of gaps connects the first reservoir in fluid communication with the second reservoir.
Semiconductor Devices and Methods of Manufacture
A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduced the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.
NANOPORE FABRICATION
Systems comprising a light source, thin membrane immersed in an aqueous solution and a system to direct and focus light from the light source to a spot on the membrane are provided. Methods of thinning and etching a membrane are also provided, as are membranes comprising a nanopore with a Gaussian curve shaped cross-section.
NANOFABRICATION OF DETERMINISTIC DIAGNOSTIC DEVICES
A diagnostic chip for detecting biomarkers and trace amounts of nanoparticles in chemical mixtures or in water. The diagnostic chip includes one or more inputs, where a sample containing differently sized particles is introduced into at least one of these inputs. Furthermore, the diagnostic chip includes multiple separation regions, where the sample is pressurized as it passes through the separation regions. Each separation region includes a deterministic lateral displacement array, where the deterministic lateral displacement array in two or more of these separation regions has a different etch depth profile. In this manner, the diagnostic chip effectively detects biomarkers and trace amounts of nanoparticles in chemical mixtures or in water.
Improved Filtration Membrane and Methods of Making and Using the Same
The present disclosure provides an improved filtration membrane suitable for filtration of blood in vivo. The improved filtration membrane is resistant to breakage with minimal areal penalty due to presence of a system of supports on the backside of the membrane. The minimal areal penalty is achieved by using supports that provide a hierarchical scaffolding that comprises ribs of two different heights as disclosed herein.
Method of manufacturing semiconductor devices including the steps of removing a plurality of spacers that surrounds each of the plurality of nanotubes into a layer of nanotubes, and forming gate dielectric and/or gate electrode
A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.
NEW PROCESS FOR GRAPHENE MEMBRANES LATTICE ENGINEERING AND USES THEREOF
The invention relates to a millisecond gasification method to fabricate graphene membranes, yielding a molecular sieving resolution of 0.2 Å for selective gas separation, and further relates to a method of preparation and uses thereof. In particular, the invention relates to the graphene membranes that have large CO.sub.2 permeances combined with attractive CO.sub.2/N.sub.2 and CO.sub.2/CH.sub.4 selectivity.
Method of Manufacturing Semiconductor Devices
A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.