Patent classifications
H10D89/213
Flexible electronic assembly
A flexible electronic assembly includes a flexible supporting assembly, an electronic component, and a cover layer. The flexible supporting assembly includes a first surface and a second surface opposite to the first surface. In a plan view of the flexible electronic assembly, the second surface includes a plurality of protrusions and one of the protrusions includes at least one rounded corner. The electronic component is coupled to the first surface of the flexible supporting assembly. The cover layer is coupled to the electronic component.
Semiconductor cell and active area arrangement
An integrated circuit including a first cell and a second cell. The first cell includes a first plurality of active areas that extend in a first direction and a first plurality of gates that extend in a second direction that crosses the first direction, the first cell having first cell edges defined by breaks in the first plurality of gates. The second cell includes a second plurality of active areas that extend in the first direction and a second plurality of gates that extend in the second direction, the second cell having second cell edges defined by breaks in the second plurality of gates. Each of the second plurality of active areas is larger than each of the first plurality of active areas and the first cell is adjacent the second cell such that the first cell edges align with the second cell edges.
Capacitor and method for forming the same
An integrated circuit (IC) structure includes a semiconductor substrate, a shallow trench isolation, and a capacitor. The STI is in the semiconductor substrate. The capacitor is over the STI. The capacitor includes first a dummy gate strip, a second dummy gate strip extending in parallel with the first dummy gate strip, a plurality of first metal contacts landing on the first dummy gate strip, and a plurality of second metal contacts landing on the second dummy gate strip.
SEMICONDUCTOR CELL AND ACTIVE AREA ARRANGEMENT
An integrated circuit including a first cell and a second cell. The first cell includes a first plurality of active areas that extend in a first direction and a first plurality of gates that extend in a second direction that crosses the first direction, the first cell having first cell edges defined by breaks in the first plurality of gates. The second cell includes a second plurality of active areas that extend in the first direction and a second plurality of gates that extend in the second direction, the second cell having second cell edges defined by breaks in the second plurality of gates. Each of the second plurality of active areas is larger than each of the first plurality of active areas and the first cell is adjacent the second cell such that the first cell edges align with the second cell edges.