Patent classifications
B81C1/00293
MEMS Device Built On Substrate With Ruthenium Based Contact Surface Material
A method of fabricating and packaging an ohmic micro-electro-mechanical system (MEMS) switch device may comprise constructing the switch device on an insulating substrate. The switch device may have contacts that consist of a platinum-group metal. The method may further comprise forming an oxidized layer of the platinum-group metal on an outer surface of each of the one or more contacts. The method may further comprise bonding an insulating cap to the insulating substrate, to hermetically seal the switch device. The bonding may occur in an atmosphere that has a proportion of oxygen within a range of 0.5% to 30%, such that, after the switch device has been hermetically sealed within the sealed cavity, an atmosphere within the sealed cavity has a proportion of oxygen within the range of 0.5% to 30%. The platinum-group metal may be ruthenium, and the oxidized layer of the platinum-group metal may be ruthenium dioxide.
BONDED STRUCTURES
A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.
Multi-layer sealing film for high seal yield
A multi-layer sealing film for high seal yield is provided. In some embodiments, a substrate comprises a vent opening extending through the substrate, from an upper side of the substrate to a lower side of the substrate. The upper side of the substrate has a first pressure, and the lower side of the substrate has a second pressure different than the first pressure. The multi-layer sealing film covers and seals the vent opening to prevent the first pressure from equalizing with the second pressure through the vent opening. Further, the multi-layer sealing film comprises a pair of metal layers and a barrier layer sandwiched between metal layers. Also provided is a microelectromechanical systems (MEMS) package comprising the multilayer sealing film, and a method for manufacturing the multi-layer sealing film.
MEMS DEVICE AND MANUFACTURING METHOD OF THE SAME
A MEMS device is provided. The MEMS device includes a substrate having at least one contact, a first dielectric layer disposed on the substrate, at least one metal layer disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the metal layer and having a recess structure, and a structure layer disposed on the second dielectric layer and having an opening. The opening is disposed to correspond to the recess structure, and the cross-sectional area at the bottom of the opening is smaller than the cross-sectional area at the top of the recess structure. The MEMS device also includes a packaging layer, and at least a portion of the packaging layer is disposed in the opening and the recess structure. The second dielectric layer, the structure layer, and the packaging layer define a chamber.
Method for sealing an access opening to a cavity and MEMS component comprising a sealing element
A method for sealing an access opening to a cavity comprises the following steps: providing a layer arrangement having a first layer structure and a cavity arranged adjacent to the first layer structure, wherein the first layer structure has an access opening to the cavity, performing a CVD layer deposition for forming a first covering layer having a layer thickness on the first layer structure having the access opening, and performing an HDP layer deposition with a first and second substep for forming a second covering layer on the first covering layer, wherein the first substep comprises depositing a liner material layer on the first covering layer, wherein the second substep comprises partly backsputtering the liner material layer and furthermore the first covering layer in the region of the access opening, and wherein the first and second substeps are carried out alternately and repeatedly a number of times.
Wafer level integrated MEMS device enabled by silicon pillar and smart cap
The present disclosure relates to a micro-electro mechanical system (MEMS) package and a method of achieving differential pressure adjustment in multiple MEMS cavities at a wafer-to-wafer bonding level. In some embodiments, a ventilation trench and an isolation trench are concurrently within a capping substrate. The isolation trench isolates a silicon region and has a height substantially equal to a height of the ventilation trench. A sealing structure is formed within the ventilation trench and the isolation trench, the sealing structure filing the isolation trench and defining a vent within the ventilation trench. A device substrate is provided and bonded to the capping substrate at a first gas pressure and hermetically sealing a first cavity associated with a first MEMS device and a second cavity associated with a second MEMS device. The capping substrate is thinned to open the vent to adjust a gas pressure of the second cavity.
Semiconductor structure and manufacturing method for the same
The present disclosure provides a semiconductor structure, including a sensing substrate, a capping substrate over the sensing substrate, the capping substrate having a first surface facing toward the sensing substrate and a second surface facing away from the sensing substrate, wherein the capping substrate comprises a through hole extending from the first surface to the second surface, a spacer between the sensing substrate and the capping substrate, the spacer, the sensing substrate, and the capping substrate forming a cavity connecting with the through hole, and a sealing structure at the second surface and aligning with the through hole, wherein the sealing structure comprises a metal layer and a dielectric layer.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A recess is formed in one silicon substrate. A silicon oxide film is formed in another one silicon substrate at a portion space apart from a space-to-be-formed region. The silicon oxide film has a groove surrounding the space-to-be-formed region and extending to an outer periphery of the other one silicon substrate. Further, the other one silicon substrate and the one silicon substrate are directly bonded to each other via the silicon oxide film so as to cover the groove. A gas discharge passage, a stacking structure of the silicon substrates and the silicon oxide film are formed, and the space is formed inside the stacking structure by the recess. Then, by the heat treatment, the gas inside the space is discharged to the outside of the stacking structure through the gas discharge passage.
Semiconductor pressure sensor
In a semiconductor pressure sensor element, a first hydrogen permeation protection film is provided on a principal surface side of a first silicon substrate, and a second hydrogen permeation protection film is provided on a principal surface side of a second silicon substrate. The permeation paths of the hydrogen fluxes shown by the arrows A and B in FIG. 9 are blocked by the films. Also, a trench surrounding a reference pressure chamber is provided, and the first hydrogen permeation protection film and a third hydrogen permeation protection film are joined at the bottom portion of the trench, thereby blocking the permeation path of the hydrogen flux shown by the arrow C in FIG. 9. Furthermore, by providing a hydrogen storage chamber, hydrogen is trapped before the hydrogen reaches the reference pressure chamber.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR THE SAME
The present disclosure provides a method for fabricating a semiconductor structure, including bonding a capping substrate over a sensing substrate, forming a through hole traversing the capping substrate, forming a dielectric layer over the capping substrate under a first vacuum level, and forming a metal layer over the dielectric layer under a second vacuum level, wherein the second vacuum level is higher than the first vacuum level.