The invention relates in particular to a method for producing subsequent patterns in an underlying layer (120), the method comprising at least one step of producing prior patterns in a carbon imprintable layer (110) on top of the underlying layer (120), the production of the prior patterns involving nanoimprinting of the imprintable layer (110) and leave in place a continuous layer formed by the imprintable layer (110) and covering the underlying layer (120), characterized in that it comprises the following step: at least one step of modifying the underlying layer (120) via ion implantation (421) in the underlying layer (120), the implantation (421) being carried out through the imprintable layer (110) comprising the subsequent patterns, the parameters of the implantation (421) being chosen in such a way as to form, in the underlying layer (120), implanted zones (122) and non-implanted zones, the non-Implanted zones defining the subsequent patterns and having a geometry that is dependent on the prior patterns.

A method of manufacturing a semiconductor device is provided. The method includes the following operations. (a) A substrate is patterned. (b) A polymer layer is formed on the patterned substrate. (c) The polymer layer is patterned. Steps (a), (b) and (c) are repeated alternatingly. An intensity of an emission light generated by a reaction of a plasma and a product produced in steps (a), (b) and (c) is detected. An endpoint in patterning the substrate is determined according to the intensity of the emission light generated by the reaction of the plasma and the product produced in only one step of steps (a), (b) and (c). A sampling rate of the intensity is ranged from 1 pt/20 ms to 1 pt/100 ms. A smooth function is used to process the intensity of the emission light generated by the reaction of the plasma and the product.

A MEMS structure includes a substrate, an inter-dielectric layer on a front side of the substrate, a MEMS component on the inter-dielectric layer, and a chamber disposed within the inter-dielectric layer and through the substrate. The chamber has an opening at a backside of the substrate. An etch stop layer is disposed within the inter-dielectric layer. The chamber has a ceiling opposite to the opening and a sidewall joining the ceiling. The sidewall includes a portion of the etch stop layer.