A robust and general fabrication/manufacturing method is described herein for the fabrication of periodic three-dimensional (3D) hierarchical nanostructures in a highly scalable and tunable manner. This nanofabrication technique exploits the selected and repeated etching of spherical particles that serve as resist material and that can be shaped in parallel for each processing step. The method enables the fabrication of periodic, vertically aligned nanotubes at the wafer scale with nanometer-scale control in three dimensions including outer/inner diameters, heights/hole-depths, and pitches. The method was utilized to construct 3D periodic hierarchical hybrid silicon and hybrid nanostructures such as multi-level solid/hollow nanotowers where the height and diameter of each level of each structure can be configured precisely as well as 3D concentric plasmonic supported metal nanodisk/nanorings with tunable optical properties on a variety of substrates.

A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.

The present invention provides a manufacturing method for MEMS structure. The method includes steps of: S1: providing a substrate, including a structural layer and a silicon-based layer overlapped with the structural layer; S2: carrying out a main etching process for etching out a cavity hole from an end of the silicon-based layer, which is far away from the structural layer, in a direction toward the structural layer until the cavity hole contacts the structural layer; and S3: carrying out an over-etching process for deepening the cavity hole and control an included angle between a side wall of the cavity hole and the structural layer to be larger than 10 but smaller than 90. The invention also provides a MEMS structural and a MEMS microphone manufactured by the method.

A method comprises: patterning a substrate, including a conductive region, with photoresist exposed by lithography, where the substrate is mounted on a handle substrate; forming a comb structure with conductive fingers on the substrate by at least removing a portion of the conductive region of the substrate; removing the photoresist; forming, one atomic layer at a time, at least one atomic layer of at least one conductor over at least one sidewall of each conductive finger; attaching at least one insulator layer to the comb structure, and the substrate from which the comb structure is formed; and removing the handle substrate.

A method for manufacturing a MEMS unit for a micromechanical pressure sensor. The method includes the steps: providing a MEMS wafer including a silicon substrate and a first cavity formed therein, under a sensor membrane; applying a layered protective element on the MEMS water; and exposing a sensor core from the back side, a second cavity being formed between the sensor core and the surface of the silicon substrate, and the second cavity being formed with the aid of an etching process which is carried out with the aid of etching parameters changed in a defined manner; and removing the layered protective element.

A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.

A method of manufacturing a semiconductor device is provided. The method includes the following operations. (a) A substrate is patterned. (b) A polymer layer is formed on the patterned substrate. (c) The polymer layer is patterned. Steps (a), (b) and (c) are repeated alternatingly. An intensity of an emission light generated by a reaction of a plasma and a product produced in steps (a), (b) and (c) is detected. An endpoint in patterning the substrate is determined according to the intensity of the emission light generated by the reaction of the plasma and the product produced in only one step of steps (a), (b) and (c). A sampling rate of the intensity is ranged from 1 pt/20 ms to 1 pt/100 ms. A smooth function is used to process the intensity of the emission light generated by the reaction of the plasma and the product.

A method for manufacturing a mirror device, the method includes a first step of preparing a wafer having a support layer, a device layer, and an intermediate layer; a second step of forming a slit in the wafer such that the movable portion becomes movable with respect to the base portion by removing a part of each of the support layer, the device layer, and the intermediate layer from the wafer and forming a plurality of parts each corresponding to the structure in the wafer, after the first step; a third step of performing wet cleaning using a cleaning liquid after the second step; and a fourth step of cutting out each of the plurality of parts from the wafer after the third step. In the second step, a part of the intermediate layer is removed from the wafer by anisotropic etching.

A method for manufacturing a mirror device, the method includes a first step of preparing a wafer having a support layer and a device layer; a second step of forming a slit in the wafer such that the movable portion becomes movable with respect to the base portion by removing a part of each of the support layer and the device layer from the wafer by etching and forming a plurality of parts each corresponding to the structure in the wafer, after the first step; a third step of performing wet cleaning for cleaning the wafer using a cleaning liquid after the second step; and a fourth step of cutting out each of the plurality of parts from the wafer after the third step. In the second step, a circulation hole penetrating the wafer is formed at a part other than the slit in the wafer by the etching.

A semiconductor device production method includes performing trench etching to form a trench in a thickness direction of a semiconductor layer so that both of a first pattern portion and a second pattern portion whose side walls face each other across the trench are formed. In the trench etching, the semiconductor layer is etched and removed while a protective film is formed on a surface of the semiconductor layer, and the trench etching is performed so that the first pattern portion and the second pattern portion are configured to have a same potential or a same temperature during the trench etching.