A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

A method of etching features in a silicon wafer includes coating a top surface and a bottom surface of the silicon wafer with a mask layer having a lower etch rate than an etch rate of the silicon wafer, removing one or more portions of the mask layer to form a mask pattern in the mask layer on the top surface and the bottom surface of the silicon wafer, etching one or more top surface features into the top surface of the silicon wafer through the mask pattern to a depth plane located between the top surface and the bottom surface of the silicon wafer at a depth from the top surface, coating the top surface and the one or more top surface features with a metallic coating, and etching one or more bottom surface features into the bottom surface of the silicon wafer through the mask pattern to the target depth plane.

An etching method for anisotropically structuring a substrate by means of deep reactive-ion etching (DRIE) includes several alternating successive etching steps and passivation steps. According to the invention, a fluorine gas mixture having a proportion of more than 25% up to and including 40% of fluorine, a proportion of 1% to 50% of nitrogen and a proportion of 30% up to and including 60% of a noble gas is used for etching. In addition, the invention concerns the use of such a fluorine gas mixture as well as a corresponding apparatus for structuring a substrate by means of the inventive fluorine gas mixture.

A sensor includes a sensor substrate, and an upper lid substrate joined to an upper surface of the sensor substrate. The sensor substrate includes a fixed part, a deformable beam connected to the fixed part, and a weight connected to the beam. The weight is movable relative to the fixed part. The upper lid substrate includes a first part containing silicon and a second part joined to the first part and containing glass. The first part includes a projection protruding toward the sensor substrate relative to the second part. The sensor has high accuracy or high reliability.

A microstructured substrate includes a plurality of at least one elementary microstructure. An electrical storage device, and more particularly an all-solid-state battery, can include the microstructured substrate.

Material structures and methods for etching hexagonal, single-crystal silicon carbide (SiC) materials are provided, which include selection of on-axis or near on-axis hexagonal single-crystal SiC material as the material to be etched. The methods include etching of SiC bulk substrate material, etching of SiC material layers bonded to a silicon oxide layer, etching of suspended SiC material layers, and etching of a SiC material layer anodically bonded to a glass layer. Plasma-etched hexagonal single-crystal SiC materials of the invention may be used to form structures that include, but are not limited to, microelectromechanical beams, microelectromechanical membranes, microelectromechanical cantilevers, microelectromechanical bridges, and microelectromechanical field effect transistor devices. The material structures and methods of the invention beneficially provide improved etch symmetry, improved etch straightness, improved sidewall straightness, improved sidewall smoothness, and reduced sidewall wander compared to etched four degree off-axis SiC materials.

A method for producing a micromechanical pressure sensor. The method includes: providing a MEMS wafer having a silicon substrate and a first cavity developed therein underneath a sensor diaphragm; providing a second wafer; bonding the MEMS wafer to the second wafer; and exposing a sensor core from the rear side; a second cavity being formed in the process between the sensor core and the surface of the silicon substrate, and the second cavity being developed with the aid of an etching process which is carried out using etching parameters that are modified in a defined manner.

An etching method of the invention includes: a resist pattern-forming step of forming a resist layer on a target object, the resist layer being formed of a resin, the resist layer having a resist pattern; an etching step of etching the target object via the resist layer having the resist pattern; and a resist protective film-forming step of forming a resist protective film on the resist layer. The etching step is repetitively carried out multiple times. After the etching steps are repetitively carried out multiple times, the resist protective film-forming step is carried out.

A gyro sensor includes a plurality of beams connected via a turnaround part. A groove is provided on a main surface of at least one beam of the plurality of beams. Wall thicknesses on the main surface of two sidewalls facing each other of the groove in a direction orthogonal to a longitudinal direction of the beam satisfy 0.9T1/T21.1, where T1 is the wall thickness of one sidewall and T2 is the wall thickness of the other sidewall.