A method for manufacturing a dual-cavity structure and a dual-cavity structure, including: etching on a semiconductor substrate to form a first trench array, tops of the first trench array being separated from each other and bottoms thereof being communicated with each other to form a first cavity; growing a first epitaxial layer on the semiconductor substrate on which the first trench array is formed, to cover the first trench array by the first epitaxial layer; etching on the first epitaxial layer to form a second trench array; tops of the second trench array being separated from each other and bottoms thereof being communicated with each other to form a second cavity; growing a second epitaxial layer on the first epitaxial layer on which the second trench array is formed; and etching the first epitaxial layer and the second epitaxial layer to form a straight groove.

A capacitive micromachined ultrasonic transducer including a lower electrode, an upper electrode, and a membrane attached to the upper electrode and positioned between the lower electrode and the upper electrode. Anchors are connect to the membrane and the lower electrode such that a cavity is defined between the lower electrode and the membrane. One or more posts are positioned within the cavity, the posts partially buried within the membrane and extending towards the lower electrode. A method of producing a capacitive micromachined ultrasonic transducer includes forming an oxide growth layer on a device layer of undoped silicon and removing portions of the oxide growth layer to form anchors extending beyond the outer surface of the device layer and posts partially buried within post holes in the device layer and extending beyond the outer surface of the device layer.

A method of forming an ultrasonic transducer device includes forming an insulating layer having topographic features over a lower transducer electrode layer of a substrate; forming a conformal, anti-stiction layer over the insulating layer such that the conformal layer also has the topographic features; defining a cavity in a support layer formed over the anti-stiction layer; and bonding a membrane to the support layer.

A chip package includes a semiconductor substrate and a metal layer. The semiconductor substrate has an opening and a sidewall surrounding the opening, in which an upper portion of the sidewall is a concave surface. The semiconductor substrate is made of a material including silicon. The metal layer is located on the semiconductor substrate. The metal layer has plural through holes above the opening to define a MEMS (Microelectromechanical system) structure, in which the metal layer is made of a material including aluminum.

The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, a metallization layer over the substrate, and a sensing structure over the metallization layer. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier in proximity to a top surface of the outgassing layer, the patterned outgassing barrier exposing a portion of the outgassing layer, and an electrode over the patterned outgassing barrier. The method for manufacturing the semiconductor device is also provided.

The present disclosure relates to a MEMS package having different trench depths, and a method of fabricating the MEMS package. In some embodiments, a first trench in a first device region, a second trench in a second region, and a scribe trench in a scribe line region are formed at a front side of a cap substrate. Then, a hard mask is formed and patterned over the cap substrate. Then, a stopper is formed by performing an etch to the cap substrate such that a first portion of a bottom surface of the first trench uncovered by the hard mask is recessed while a second portion of the bottom surface of the first trench covered by the hard mask is non-altered to form a stopper within the first trench. Then, a second etch is performed to the second trench to lower the bottom surface of the second trench.

Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.

Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.

In a forming method of an inertial sensor, a trench is formed in a conducting material layer, so that a formed movable comb tooth structure can be spaced from the conducting material layer. A thin film layer is further arranged at a bottom of the trench. The thin film layer can be used not only for realizing etching blocking, but also for fixing comb teeth of the movable comb tooth structure while executing an etching process for forming the movable comb tooth structure, thereby avoiding damage to side walls of the comb teeth due to torsion of the comb teeth. In addition, a thickness of the thin film layer can be made small, and correspondingly, the thin film layer can be removed by a small etching amount, without causing a large amount of erosion to other film layers, which is conducive to guaranteeing stability of modules in a device.

An ultrasound transducer device includes an electrode, a membrane separated from the electrode by a cavity between the membrane and the electrode, a patterned membrane support layer that defines a size and shape of the cavity and that is disposed between the electrode and the membrane, and vias that electrically connect the electrode to a substrate. The vias are disposed in the ultrasound transducer device such that less than 50% of the vias overlap with a support surface of the patterned membrane support layer, in a plan view.