A method for manufacturing a component in a substrate including: a) modifying a structure of at least one region of the substrate to make the at least one region more selective; and b) chemically etching the at least one region to selectively manufacture the component.

One example discloses an chip, comprising: a substrate; a first side of a passivation layer coupled to the substrate; a device, having a device height and a cavity, wherein a first device surface is coupled to a second side of the passivation layer which is opposite to the first side of the passivation layer; and a set of structures coupled to the second side of the passivation layer and configured to have a structure height greater than or equal to the device height.

A semiconductor device structure is provided. The semiconductor device structure includes a first substrate including a first face and a second face opposite the first face. A second substrate is bonded to the first face of the first substrate such that the second face of the first substrate faces away from the second substrate. One or more recesses are arranged in the second face of the first substrate and are configured to compensate for thermal expansion or thermal contraction.

A semiconductor device structure is provided. The semiconductor device structure includes a first substrate including a first face and a second face opposite the first face. A second substrate is bonded to the first face of the first substrate such that the second face of the first substrate faces away from the second substrate. One or more recesses are arranged in the second face of the first substrate and are configured to compensate for thermal expansion or thermal contraction.

A method for manufacturing a mirror device, the method includes a first step of preparing a wafer having a support layer and a device layer; a second step of forming a slit in the wafer such that the movable portion becomes movable with respect to the base portion by removing a part of each of the support layer and the device layer from the wafer by etching and forming a plurality of parts each corresponding to the structure in the wafer, after the first step; a third step of performing wet cleaning for cleaning the wafer using a cleaning liquid after the second step; and a fourth step of cutting out each of the plurality of parts from the wafer after the third step. In the second step, a circulation hole penetrating the wafer is formed at a part other than the slit in the wafer by the etching.

A method for providing a plurality of hermetically sealed packages, including the steps of: providing at least two substrates including a first substrate and a second substrate, at least one of the at least two substrates being a transparent substrate, the two substrates being arranged directly adjoining each other or on top of one another, the transparent substrate defining a circumferential rim and an upper side of each package, the bottom of the package being defined by the second substrate, a respective contact area being defined at contact surfaces between the two substrates; sealing each functional area in a hermetically tight manner by bonding the two substrates along the contact area of each package; and dicing each package by a cutting step or a separating step, a particle jet being used to abrasively remove a material from the transparent substrate by the particle jet.

A semiconductor package that contains an application-specific integrated circuit (ASIC) die and a micro-electromechanical system (MEMS) die. The MEMS die and the ASIC die are coupled to a substrate that includes an opening that extends through the substrate and is in fluid communication with an air cavity positioned between and separating the MEMS die from the substrate. The opening exposes the air cavity to an external environment and, following this, the air cavity exposes a MEMS element of the MEMS die to the external environment. The air cavity separating the MEMS die from the substrate is formed with a method of manufacturing that utilizes a thermally decomposable die attach material.

Methods, systems, and techniques for the high speed manufacture of micro-electrical mechanical systems (MEMS) arrays, such as arrays of polymeric capacitive micromachined ultrasonic transducers (CMUTs). A sheet of material from which to form cavities for the devices is obtained, and physical or energy projections are projected into the material to form the cavities. Upper and lower surfaces of the material are respectively contacted with and bonded to upper and lower metalized films. The metalized portions of the upper and lower metalized films may serve as electrodes for a CMUT, and the films themselves may be the CMUT's substrate and membrane.

In a general aspect, methods for manufacturing vapor cells are disclosed. In certain aspects, a method of manufacturing a vapor cell includes obtaining a dielectric body that has interior and exterior surfaces. The interior surface defines a cavity in the dielectric body, and the exterior surface defines an opening to the cavity. The method includes forming an antirelaxation coating on the interior surface of the dielectric body. The antirelaxation coating comprising an organosilane material. The method additionally includes disposing a vapor or a source of vapor in the cavity and obtaining an optical window that comprises a surface. The vapor or the source of vapor includes alkali metal atoms. The method also includes bonding the surface of the optical window to the exterior surface of the dielectric body to form a seal around the opening to the cavity.